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[mlir][dxsa] Add dadd, ddiv, dmax, dmin, dmul and drcp instructions#190

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Jul 1, 2026
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[mlir][dxsa] Add dadd, ddiv, dmax, dmin, dmul and drcp instructions#190
tagolog merged 1 commit into
dxsa-mlirfrom
vshiryaev/dxsa-mlir-double-arithmetic-instructions

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@tagolog tagolog commented Jun 21, 2026

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Example:
dxsa.dadd r<0>, r<1>, r<2>
dxsa.ddiv r<0>, r<1>, r<2>
dxsa.dmax r<0>, r<1>, r<2>
dxsa.dmin r<0>, r<1>, r<2>
dxsa.dmul r<0>, r<1>, r<2>
dxsa.drcp r<0>, r<1>

@tagolog tagolog requested review from asavonic, asl and hvdijk June 21, 2026 00:15
@tagolog tagolog self-assigned this Jun 21, 2026
Comment thread mlir/include/mlir/Dialect/DXSA/IR/DXSADoubleArithOps.td Outdated
Comment thread mlir/lib/Target/DXSA/BinaryParser.cpp Outdated
@tagolog tagolog force-pushed the vshiryaev/dxsa-mlir-double-arithmetic-instructions branch from c85908c to f393bc7 Compare June 25, 2026 20:02
@tagolog tagolog requested review from asl and hvdijk June 25, 2026 20:05

@asavonic asavonic left a comment

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LGTM.

Example:
  dxsa.dadd r<0>, r<1>, r<2>
  dxsa.ddiv r<0>, r<1>, r<2>
  dxsa.dmax r<0>, r<1>, r<2>
  dxsa.dmin r<0>, r<1>, r<2>
  dxsa.dmul r<0>, r<1>, r<2>
  dxsa.drcp r<0>, r<1>

Signed-off-by: Vladimir Shiryaev <vshiryaev@accesssoftek.com>
@tagolog tagolog force-pushed the vshiryaev/dxsa-mlir-double-arithmetic-instructions branch from f393bc7 to f2f643b Compare July 1, 2026 18:17
@tagolog tagolog merged commit c2b8800 into dxsa-mlir Jul 1, 2026
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4 participants