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  1. SPK286 SPK286 Public

    Synthesizable Intel 80286-compatible CPU core in SystemVerilog, with project-owned microcode, real and protected mode, and verification against hardware-captured 80286 test data.

    SystemVerilog 7

  2. PCAT-286_MiSTer PCAT-286_MiSTer Public

    Intel 80286-compatible PC/AT for MiSTer FPGA, built around the SPK286 core: AT chipset, EGA video with a VGA 13h+ extension, up to 16 MiB RAM, floppy/IDE and period audio.

    HTML 1

  3. Main_MiSTer Main_MiSTer Public

    Forked from MiSTer-devel/Main_MiSTer

    Main MiSTer binary and Wiki

    C++ 13 1

  4. PCXT_MiSTer PCXT_MiSTer Public

    PCXT port for MiSTer by spark2k06.

    SystemVerilog 64 33

  5. Tandy1000_MiSTer Tandy1000_MiSTer Public

    Tandy1000 port for MiSTer by spark2k06.

    Verilog 2 2

  6. PCjr_MiSTer PCjr_MiSTer Public

    IBM PCjr port for MiSTer by spark2k06.

    SystemVerilog 1 2