This repository contains my project on designing a low-power 8-bit Arithmetic Logic Unit (ALU) using CMOS logic and VLSI techniques.
- alu_8bit.v β Verilog code for 8-bit ALU
- tb.v β Testbench for simulation
- waveform.png β Simulation waveform output
- Arithmetic: ADD, SUB
- Logic: AND, OR, XOR, NOT
- Shift: Left & Right
- Power optimization using Clock Gating
- Verilog HDL (RTL Design)
- ModelSim / Vivado (Simulation)
- Microwind / Magic VLSI (Layout & Power Analysis)
- RTL verified using testbench
- Waveforms captured in ModelSim
- Layout generated in Microwind for power/area estimation