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praveensvk188 wants to merge 234 commits into
TexasInstruments:mainfrom
praveensvk188:v4.4.0-ti-next
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praveensvk188 wants to merge 234 commits into
TexasInstruments:mainfrom
praveensvk188:v4.4.0-ti-next

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Sunil-Hegde and others added 30 commits September 24, 2026 11:27
commit 4f24369 upstream.

- Add GPIO led node and pinmux

Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit 890ac94 upstream.

- Add I2C0 and I2C1 pinmux
- Add EEPROM and IO expander as child nodes of I2C0
  and I2C1 respectively.

Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit ae088b5 upstream.

Add DM timer nodes for main domain with scmi clocks, pds
and Interrupts.

Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit d7cf5fe upstream.

Upstream CMSIS_6 is now consumable as a Zephyr module, but does
not provide CMake build files to preserve portability for
non-Zephyr users.

CMSIS Core is header-only, so integration only requires headers.
Drop add_subdirectory() and add the include path via
zephyr_include_directories().

Keep __PROGRAM_START handling in the Zephyr module integration layer.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
commit db0794f upstream.

Update hal_ti module revision to d9d5b1c which migrates SoC selection
from compiler flags (zephyr_compile_definitions) to a generated C header
(zephyr_device_selection.h) included by DeviceFamily.h.

This removes the need for zephyr_compile_definitions() in
soc/ti/mspm/CMakeLists.txt.

Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
commit e143f74 upstream.

Replace SOC_FAMILY_TI_MSPM0 with HAS_MSPM0_SDK in the depends on
clauses for the clock_control and hwinfo MSPM0 drivers.

HAS_MSPM0_SDK is selected by all MSPM0 SoC series and is the correct
guard for SDK-dependent drivers. This avoids enumerating individual
SoC series and is consistent with how other SDK-gated code is guarded.

Drop the SOC_FAMILY_TI_MSPM0 dependency from the entropy driver
entirely as it is already guarded by DT_HAS_TI_MSPM0_TRNG_ENABLED.

Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
commit 861383f upstream.

Move d-philpot to collaborator as his current role outside of TI is no
longer Zephyr-related and he is not actively maintaining the platform.

Add glneo as maintainer. He is an active open source contributor across
multiple software ecosystems including Linux, TF-A, Yocto, and Zephyr
RTOS (TI k3 SoC family support and maintainership). His cross-stack
expertise and deep understanding of TI platforms make him well-positioned
to support long-term maintenance and improve upstream collaboration.

Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
commit a18ba0e upstream.

Rename the TI MSP SoC family symbol from SOC_FAMILY_TI_MSPM0 to
SOC_FAMILY_TI_MSPM and directory from soc/ti/mspm0 to soc/ti/mspm
to accommodate upcoming MSP series beyond MSPM0 (MSPM0G, MSPM0L,
MSPM33) without ambiguity with other MSP product lines (MSP430,
MSP432).

Gate MSPM0-specific configs (MSPM0_PERIPH_STARTUP_DELAY, mclk
clock default) on MSPM0 series symbols to prevent unintended
enablement on future series.
No functional change for existing MSPM0G and MSPM0L builds.

Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
commit 7ac7325 upstream.

Add initial SoC series support for the TI MSPM33C321A.
The MSPM33C series has no dependency on the TI MSPM0 SDK/HAL.

Guard common/soc.c and HAL includes in common/soc.h with
CONFIG_HAS_MSPM0_SDK so they compile only for MSPM0G/MSPM0L series.

Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
commit 6cd9a72 upstream.

Add device tree source files for the TI MSPM33C321A.
CPU node, ARMv8-M NVIC with 2 priority bits, and
base SRAM/flash memory nodes common to the MSPM33C series
with mspm33c321a device specific memory sizes.

Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
commit d921a67 upstream.

Add minimal board support for the TI LP-MSPM33C321A LaunchPad
Add Devicetree and Kconfig integration for the lp_mspm33c321a
board

Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
commit 0f0d43a upstream.

Add RST documentation for the LP-MSPM33C321A LaunchPad board covering
hardware overview, peripheral mapping, clock tree, and build/flash/debug
instructions. Notes that MSPM33 OpenOCD support is not yet upstream and
requires the TI OpenOCD fork.

Add board.cmake enabling the openocd runner for west flash/debug.

Signed-off-by: Aman Lachhiramka <a-lachhiramka@ti.com>
commit 7609d18 upstream.

Currently all boards use the driver which only configures
NMI mode for a window violation. With this change:
 - If interrupts are present in the DT, hardware is NMI capable
 - If reset-capable property is true, hardware can generate a reset

By this we can define the capabilities of the hardware based on
which the driver can configure NMI or Reset mode. The existing
nodes in the boards which support NMI  will not be affected
since all of them provide IRQ numbers.

Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit c4a791d upstream.

If DT has IRQ defined, the board supports NMI mode, if reset-capable
property is set then the board can support reset as well. Based
on these DT properties and the flags passed by the application,
NMI mode or Reset mode can be set.

Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit 060c42d upstream.

 - Add scmi clocks for both RTI0 and RTI1 nodes.
 - Add reset-capable property so that the driver can configure
   reset mode supported by AM62L boards.

Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit 2161d94 upstream.

Set status for watchdog node and also add an alias for watchdog.

Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit f38aa64 upstream.

Symbols FLASH_SIZE and FLASH_BASE_ADDRESS are already
defined (with same defaults) in arch/Kconfig.

Signed-off-by: Flavio Ceolin <flavio@hubble.com>
commit 842142f upstream.

Split up the am6x Kconfig files into am62x, am62lx, am64x and j72x to allow
different configurations for different SoC series. While this adds some
redundancy it allows better separation in case some configuration options
between SoCs need to be different, like the number of interrupts on
Cortex-R processors.

Furthermore some ARM-cores were theoretically configured but not actually
supported as build target for the general am6x SoC series, sometimes
because the cores are not present in the SoC itself (e.g. non Cortex-A
cores for the AM62Lx series) and sometimes because nobody added support yet
(e.g. Cortex-A on the AM64x series). Therefor all currently non-supported
combinations have been removed.

Finally the common files were put into the K3 family directory and
clang-format was run on them.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
commit 11f46ca upstream.

The Cortex-R cores in the AM64x SoC have 256 instead of 512 interrupts.
This was set wrong since the AM64x Cortex-R options came from the J72x
options which has 512 interrupts connected to the Cortex-R via the VIM.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
…ed ...

commit 81cca2f upstream.

The SoCs in the TI K3 family enable the OpenAMP resource table
automatically in the Kconfig instead of being disabled due to being
optional in some cases. It is optional when booting after a SBL from the TI
MCU+ SDK but it is required when booting via remoteproc from Linux.

Due to this the enabling has been moved to the board level and whether it
is enabled is based on the documented boot method. For the undocumented
Cortex-R cores on the SK-AM64 it has been enabled since the Cortex-M core
has documentation for booting via remoteproc and for the Cortex-M core on
the AM243-EVM it has been disabled due to having no Cortex-A cores to run
Linux on.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
commit 87bd8d3 upstream.

The Cortex-R frequency for the TI K3 series relies on the clock frequency
of the external crystal since it uses the DMTimer interrupt and the DMTimer
uses the external crystal clock as input clock. While some SoC series
inside the K3 family only allow one frequency for the external crystal
(based on the bootmode pin documentation inside the TRM) other allow
multiple possible frequencies. For SoC series that only allow one frequency
it is stored inside the series defconfig (am64x and j722s) and for series
that allow multiple frequencies it was moved to the board defconfigs
(j721e).

Additionally this frequency was wrong for the am64x and j722s series and
got corrected to 25 MHz.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
commit 7931f60 upstream.

In the J721e and J722s Kconfig.soc fiels there was a mistake that resulted
in both series being wrongfully selected instead of only the own one. This
has been fixed by removing the wrong Kconfig lines.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
commit c57454d upstream.

The Cortex-R cores on the J721e don't have a fixed frequency and are
instead running at the frequency of the external oscillator. The retrieval
logic has been moved from boards using their _defconfig files to instead
needing to define a "fixed-clock" devicetree node with the nodelabel
"onboard_osc" whose frequency is then retrieved in the general J721e SoC
series defconfig

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
commit 6846bec upstream.

Add the AM243x Launchpad board from TI. It's possible to run the blinky and
echo_bot example on the Cortex-R5F core and there is some serial output
from the Cortex-M4F when running the hello_world sample.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
commit f96fe2a upstream.

Allow configuring the clock source for TI's dmtimer using syscon driver for
MMR writes. The new property "clksel" takes offset and value to select
the mux configuration.

This is required since there are no clock parent APIs in the clock
controller subsystem as of now.

Signed-off-by: Amneesh Singh <amneesh@ti.com>
…a s...

commit 91d25fc upstream.

Use TI contol module (MMR) via clksel specifier-space to configure the
clock source for TI's DMtimer.

Signed-off-by: Amneesh Singh <amneesh@ti.com>
commit 694182b upstream.

Use the chosen zephyr,system-timer property to indicate which timer is used
as system timer and move the timer selection from the board to the SoC
itself.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
commit 4b4a680 upstream.

Use the chosen zephyr,system-timer property to indicate which timer is used
as system timer and move the timer selection from the board to the SoC
itself.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
… in...

commit ee994a9 upstream.

This assigns the device pointer used for the timer during compile time
instead of assigining it at runtime during initialization. This prevents
overwriting the exception vector on Cortex-R5 cores, if a timer is used
before the kernel initialization finished.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
commit 4756085 upstream.

The ti_dmtimer driver used to use the first enabled compatible timer
instead of honoring the chosen zephyr,system-timer property. This has been
fixed.

Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
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