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The page says a second card is on par with the faster card alone for decode, and that a third, slower card makes a pair slower. Both were measured on a fast desktop CPU (9950X3D), so a reader with two identical older cards on a slower workstation CPU cannot tell which side of that line they are on, and on that machine the answer is not on par. Adds one bullet that names the condition (the CPU pool is what the window waits on), the measured numbers on two RTX 2080 Ti over a dual-socket Xeon E5-2696 v4 at 180 W and engine 0.1.49, and the mechanism from STRATA_DECODE_TIMING=1: decode 35.2 to 51.0 tok/s, an 11.6K prompt 672 to 908 tok/s, the window 70.06 to 37.96 ms, and the CPU pool 9.52 to 0.79 ms. Docs only; no behavior change and no default touched.
One bullet from PR #3930 by NorwinYu: on two identical RTX 2080 Ti over a dual-socket Xeon E5-2696 v4 a plain split moved decode from 35.2 to 51.0 tok/s and an 11.6K prompt from 672 to 908 tok/s, because the CPU pool per window fell from 9.52 to 0.79 ms (STRATA_DECODE_TIMING=1). The page's own 5080 + 3090 figures, where the second card is on par, came from a fast CPU; the bullet says so and that it is one measurement. No code changes: setup already splits across two cards. Shipped without a hardware run of ours; the reply asks owners of two older cards on slow CPUs to compare and report.
Ported PRs (authors kept) and our fixes, plus the owner's part-2 items: the restored TROUBLESHOOTING entries with a link check, #3895 (no shared-expert fork calibration on Windows HIP with --kv-resident; a warning on a hand-set STRATA_SH_STREAM=1), #3930 (docs), #3421 (Docker stops when models are present and MODEL_PATH is unset), #3570 (launch --show-key reads setup's config), #3311 (engine paragraph only) and #3029 (Strix Halo Windows guide, re-measured on 0.2.7).
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Thank you. The text is in 0.2.7 (docs/MULTI_GPU.md). We could not repeat your two-card runs with a slow CPU, so please try 0.2.7 and tell us whether the page matches your measurements. Release: https://github.com/Niko1221/Strata/releases/tag/v0.2.7 |
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@NorwinYu I have dual Titan Xp pascal cards on a Xeon W-2123 4c/8t cpu if that qualifies as a slow cpu. Let me know if you want me to do any testing. |
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A two-card run on a slower CPU than the page's E5-2696 v4, if it helps: Dell T630, 2x Xeon E5-2620 v3 (6C/12T each, 2.4 GHz, AVX2, no AVX-512), 2x RTX 3090 on PCIe 3.0 x16, one card per socket, original Flash-Next IQ3_S,
So on this CPU the split pays about +50% on decode, is flat on a 32K read (the hop costs what the extra residency gains), and +15-40% on 64-96K reads. On 0.2.7 (engine 0.1.52) with |
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@ibbobud Thanks — that would be very welcome. Yes, please do. The open-source spirit is exactly that: the more people measure, the more useful the page becomes. A 4-core CPU is a different point from either of the two boxes behind it today, so whatever you find is genuinely useful — including "no difference", which is arguably the most informative result of all. |
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@Niko1221 the 0.2.7 re-run is in #4515 as a benchmark PR. Short version: the page still matches and is now conservative on decode — split 55.5 tok/s (was 51.0), one card unchanged at 34.5, the 11.6K read 962 (was 908), and the split/one-card read ratio is still 1.35x. |
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A follow-up on the same Dell T630 from my comment above, after a CPU swap: 2x Xeon E5-2620 v3 (6C/12T each) replaced by 2x E5-2697A v4 (16C/32T each, 2.6 GHz), same board, same memory (8x 32 GB DDR4-2133, interleaved over both nodes with Old CPUs against new, same config (2 runs each)
With the experts resident, decode does not move with the CPU; the prompt read and short replies gain about 8%. That fits the page's point from the other side: on this box the GPUs are not waiting on the CPU pool for decode, so a faster CPU only shows up where the CPU still does work.
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| Workers | 32K read tok/s (runs) | Decode after 32K tok/s (runs) |
|---|---|---|
| 30 (default) | 3,014 / 3,091 | 117.8 / 119.1 |
| 30 (again, at the end of the sweep) | 2,965 / 3,205 | 119.3 / 130.9 |
| 22 | 3,030 / 2,954 | 129.7 / 119.1 |
| 18 | 3,064 / 3,116 | 122.0 / 134.8 |
| 17 | 2,859 / 3,154 | 119.5 / 124.7 |
| 15 | 3,201 / 3,150 | 126.6 / 130.2 |
| 15 (again) | 3,154 / 3,132 | 120.1 / 116.8 |
| 11 (the old CPUs' default) | 3,188 / 3,167 | 118.0 / 123.1 |
Run-to-run noise is about ±4-5% (the two 30-worker sessions alone span 2,965-3,205), so every value from 11 to 30 is within noise of the others. 15 was the most consistent on the 32K read (four runs, 3,132-3,201) and I kept it, but I would not call it a measured win. On a box with nearly every expert in VRAM, the worker count does not matter much; the larger gains in the DETAILS.md table (#3201) were on boxes with more experts on the CPU.
Not run
No STRATA_DECODE_TIMING=1 pair on the new CPUs, so I don't have the CPU-pool share of the window to put next to the page's 9.52 -> 0.79 ms. No one-card arm on the new CPUs.
Problem and result
docs/MULTI_GPU.mdsays a second card is on par with the faster card alone for decode, and that a third,slower card makes a pair slower. Both were measured on a fast desktop CPU. A reader with two identical
older cards on a slower workstation CPU cannot tell from that page which side of the line they are on,
and on such a machine the answer is not "on par".
After: one bullet under "Which cards and in what order" that names the condition — the CPU pool is what
the window waits on — with the measured numbers and the mechanism behind them.
Related discussion
The full report and raw data are in the benchmark PR: #3929. No issue: this is a docs
note backed by measurements, not a behaviour change.
Approach
One bullet, docs only. No code and no default is touched. It states:
decode 35.2 -> 51.0 tok/s, an 11.6K prompt 672 -> 908 tok/s;
STRATA_DECODE_TIMING=1: the window 70.06 -> 37.96 ms, because the CPU pool falls9.52 -> 0.79 ms per window;
Validation
Passed: the numbers are taken from the benchmark report that goes with this change, and the
STRATA_DECODE_TIMING=1output for both configs was read directly (window, CPU pool and GPU-reach valuesabove).
Failed: none observed.
Not run: no build is affected, so CUDA, HIP, SYCL and Metal are untouched. No second host was
available to check that the sentence reads correctly for someone who has not seen the report.
Limits
bottleneck" rather than giving a threshold, because I did not measure where the crossover is.
decode numbers next to it; the bullet keeps them in separate sentences.