Give workgroup barriers their memory-fence flags#587
Draft
michel2323 wants to merge 1 commit into
Draft
Conversation
`barrier(0)` lowers to an `OpControlBarrier` with `SequentiallyConsistent` semantics but no storage-class bit, which the SPIR-V spec treats as ordering no memory. So shared-local (and global) writes are not guaranteed visible to other work-items after the barrier, which can silently drop updates (e.g. a workgroup local-atomic accumulation losing counts). Pass the appropriate fence flags so the barrier actually orders memory: `LOCAL_MEM_FENCE | GLOBAL_MEM_FENCE` for KA `@synchronize` (matching CUDA `__syncthreads`), and `LOCAL_MEM_FENCE` for the mapreduce reduce_group shared-memory tree. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## main #587 +/- ##
==========================================
- Coverage 80.92% 80.89% -0.04%
==========================================
Files 48 48
Lines 3234 3234
==========================================
- Hits 2617 2616 -1
- Misses 617 618 +1 ☔ View full report in Codecov by Harness. 🚀 New features to boost your workflow:
|
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
barrier(0)lowers to anOpControlBarrierwithSequentiallyConsistentsemantics but no storage-class bit, which the SPIR-V spec treats as ordering no memory. As a result, shared-local (and global) writes are not guaranteed visible to other work-items after the barrier, which can silently drop updates — e.g. a workgroup local-atomic accumulation losing counts.This passes the appropriate fence flags so the barrier actually orders memory:
KA.__synchronize()→barrier(LOCAL_MEM_FENCE | GLOBAL_MEM_FENCE), matching CUDA__syncthreadssemantics (src/oneAPIKernels.jl).reduce_groupshared-memory reduction tree →barrier(LOCAL_MEM_FENCE)(src/mapreduce.jl).Notes
Latent correctness issue independent of the GPU stack (
barrier(0)orders no memory on any conforming runtime). Verified theLOCAL_MEM_FENCE/GLOBAL_MEM_FENCEconstants exist in SPIRVIntrinsics 1.0.0 (the versionmainpins).🤖 Generated with Claude Code