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Pull request overview
Adds explicit voltage rating headroom (“margin”) parameters for semiconductors (BJT/FET/diode) and refactors capacitor voltage derating to a consistent “margin” nomenclature with a deprecation path for the old parameter.
Changes:
- Introduces
*_voltage_marginparameters for BJTs, FETs, and diodes (default 1.25x) and applies them in parts-table filtering. - Refactors capacitors to use
voltage_margin(default 2.0x) while deprecatingvoltage_rating_derating. - Updates example designs and generated reference artifacts (netlists / svgpcb) to align with the new selection behavior and nomenclature.
Reviewed changes
Copilot reviewed 15 out of 15 changed files in this pull request and generated 6 comments.
Show a summary per file
| File | Description |
|---|---|
edg/abstract_parts/AbstractCapacitor.py |
Adds voltage_margin, deprecates voltage_rating_derating, updates table filtering logic accordingly. |
edg/abstract_parts/AbstractFets.py |
Adds drain_voltage_margin and applies it to Vds rating selection. |
edg/abstract_parts/AbstractDiodes.py |
Adds reverse_voltage_margin and applies it to Vr rating selection. |
edg/abstract_parts/AbstractBjt.py |
Adds collector_voltage_margin and applies it to Vce rating selection. |
examples/test_usb_source_measure.py |
Migrates capacitor refinements to voltage_margin and adjusts shared diode part selection. |
examples/test_robotcrawler.py |
Migrates capacitor refinement to voltage_margin. |
examples/test_iot_led_driver.py |
Migrates capacitor refinement to voltage_margin and updates comment. |
examples/test_iot_blinds.py |
Migrates capacitor refinements to voltage_margin. |
examples/test_fcml.py |
Updates class-level capacitor refinement to voltage_margin. |
examples/test_can_adapter.py |
Migrates capacitor refinement to voltage_margin. |
examples/test_bldc_controller.py |
Migrates capacitor refinements to voltage_margin. |
examples/UsbSourceMeasure/UsbSourceMeasure.svgpcb.js |
Updates generated PCB placement/footprints consistent with new selected parts. |
examples/UsbSourceMeasure/UsbSourceMeasure.net.ref |
Updates reference netlist to reflect newly selected diode parts/footprints. |
examples/IotDisplay/IotDisplay.net.ref |
Updates reference netlist diode parts consistent with new voltage headroom rules. |
examples/Datalogger/Datalogger.net.ref |
Updates reference netlist diode parts consistent with new voltage headroom rules. |
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| (["bldc_drv", "vm_cap_bulk", "cap", "voltage_margin"], 1.5), # allow using a 50V cap | ||
| (["bldc_drv", "cp_cap", "voltage_margin"], 1.5), # allow using a 50V cap |
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These voltage_margin values relax the headroom compared to the previous derating of 0.6 (which implied ~1.667x via 1/0.6). If this PR is meant to be a pure rename/refactor, consider using ~1.667 here to preserve behavior, or document that the headroom is intentionally reduced.
| if not math.isnan(self.get(self.voltage_rating_derating)): | ||
| derated_voltage = self.get(self.voltage) / self.get(self.voltage_rating_derating) | ||
| warnings.warn( | ||
| f"voltage_rating_derating is deprecated and should be replaced with voltage_margin which has inverted semantics", | ||
| DeprecationWarning, | ||
| ) | ||
| # 2.0 must be sync'd up with the default value | ||
| assert self.get(self.voltage_margin) == 2.0, "cannot use both voltage_rating_derating and voltage_margin" | ||
| else: |
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warnings.warn(..., DeprecationWarning) is executed inside _row_filter, which runs once per candidate table row. If voltage_rating_derating is set (including from internal code paths), this will likely emit the same warning many times and significantly slow / spam builds. Consider emitting the deprecation warning once per instance (eg, in __init__/generate) or gating it behind a self._warned_voltage_derating flag, and set an appropriate stacklevel so the warning points to the user callsite.
| (["reg_v5", "power_path", "in_cap", "cap", "exact_capacitance"], False), | ||
| (["reg_v5", "power_path", "in_cap", "cap", "voltage_rating_derating"], 0.85), | ||
| (["reg_v12", "cf", "voltage_rating_derating"], 0.85), | ||
| (["reg_v5", "power_path", "in_cap", "cap", "voltage_margin"], 1.1), | ||
| (["reg_v12", "cf", "voltage_margin"], 1.1), | ||
| (["conv", "power_path", "in_cap", "cap", "exact_capacitance"], False), | ||
| (["conv", "power_path", "in_cap", "cap", "voltage_rating_derating"], 0.85), | ||
| (["conv", "power_path", "in_cap", "cap", "voltage_margin"], 1.1), |
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PR description indicates this is primarily a nomenclature refactor, but the numeric conversion here is not equivalent to the previous derating factors (eg, derating 0.85 corresponds to margin ~1.176 via 1/0.85, not 1.1). If the intent is to preserve prior headroom behavior, set voltage_margin to the inverse of the removed voltage_rating_derating values; otherwise consider documenting that the voltage headroom constraints are being relaxed.
| (["control", "snub_c", "cap", "voltage_margin"], 1.5), # allow use of a 50V basic part caps | ||
| (["control", "ifilt", "c", "voltage_margin"], 1.5), |
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This changes the effective headroom vs the previous derating value (0.60 implied ~1.667x headroom via 1/0.60, but voltage_margin=1.5 is only 1.5x). If this PR is intended as a pure nomenclature refactor, consider setting voltage_margin to ~1.667 to preserve prior behavior, or add a note that the constraint is being relaxed.
| ["reg_3v3", "power_path", "in_cap", "cap", "voltage_rating_derating"], | ||
| 0.80, | ||
| ), # use a 1206 25 oe 35v part | ||
| (["reg_3v3", "power_path", "in_cap", "cap", "voltage_margin"], 1.25), # use a 1206 25 oe 35v part |
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Typo in the comment: "25 oe 35v" should be "25 or 35V".
| (["reg_3v3", "power_path", "in_cap", "cap", "voltage_margin"], 1.25), # use a 1206 25 oe 35v part | |
| (["reg_3v3", "power_path", "in_cap", "cap", "voltage_margin"], 1.25), # use a 1206 25 or 35V part |
| (["reg_14v", "inductor", "part"], "CBC3225T220KR"), | ||
| (["reg_14v", "inductor", "manual_frequency_rating"], Range(0, 17e6)), # 17MHz self-resonant | ||
| (["reg_14v", "out_cap", "cap", "voltage_rating_derating"], 0.85), | ||
| (["reg_14v", "out_cap", "cap", "voltage_margin"], 1.1), |
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This voltage_margin is not the direct inverse of the previous derating factor (0.85 -> margin ~1.176 via 1/0.85, not 1.1). If the intent is to keep the same voltage headroom behavior while renaming the parameter, consider using ~1.176 here or documenting that the constraint is being relaxed.
Refactors the capacitor to consistently use the new margin nomenclature, with deprecation path. Default for semiconductor devices is 1.25x.
Refactors examples and improves documentation. The refactored capacitor margin overrides is not meant to be exact with prior.
Resolves #419