From 64eb20ba91000a356a3b030229dbf687f4d9299c Mon Sep 17 00:00:00 2001 From: Claude Date: Mon, 28 Sep 2026 19:37:37 +0000 Subject: [PATCH] Manager J3: order the GCT USB4105-GF-A that the board is routed for The manager board's USB breakout is drawn to the USB4105 land, but the BOM listed the HRO TYPE-C-31-M-12, whose signal pads are 0.3 mm longer and whose shell stakes sit elsewhere. Dropping it onto the routed board gives 38 DRC errors round J3, so the part follows the copper instead: USB4105-GF-A, C3020560, held in JLCPCB assembly stock (1.1k) though LCSC retail shows none. USB4105-GF-A-120 (C5184243, 4.7k) is the backup. Co-Authored-By: Claude Opus 5.5 (1M context) Claude-Session: https://claude.ai/code/session_012vqeoXfZfZw2oZCwv9rjfw --- HANDOVER.md | 4 ++-- hardware/SOURCING.md | 2 +- hardware/common/lcsc_parts.py | 9 ++++++--- hardware/phase3-manager/bom/phase3-manager-bom.csv | 4 ++-- hardware/phase3-manager/bom/phase3-manager-jlcpcb.csv | 2 +- hardware/phase3-manager/mcu.kicad_sch | 6 +++--- hardware/phase3-manager/tools/route_critical.py | 4 ++-- 7 files changed, 17 insertions(+), 14 deletions(-) diff --git a/HANDOVER.md b/HANDOVER.md index e72bd4a..1486955 100644 --- a/HANDOVER.md +++ b/HANDOVER.md @@ -199,8 +199,8 @@ Notable route_board facts a future session needs: KiCad (table + per-item coords in the resume section), then `../common/finish_board.py` (silk + planes + fab) and `run_drc.py`. 2. **Phase-3 manager board — routed (2026-09-27).** Review before ordering: - the J3 breakout is tied to the USB4105 land pattern while the USB-C part - is still an open pick; 13 nets cross under the USB pair on B.Cu (fine at + J3 is the GCT USB4105-GF-A (C3020560, picked 2026-09-28 to match the + routed land; JLCPCB assembly stock, backup -120 C5184243); 13 nets cross under the USB pair on B.Cu (fine at full speed); the 0.2 mm drilling gate below still applies. 3. **Order files** — the MPN/LCSC pass is done for every part SOURCING.md verified: `python3 common/bom.py` (from `hardware/`) writes hidden diff --git a/hardware/SOURCING.md b/hardware/SOURCING.md index f44a2d4..8f6b317 100644 --- a/hardware/SOURCING.md +++ b/hardware/SOURCING.md @@ -72,7 +72,7 @@ Decisions taken this pass (user-approved 2026-07-18): | XT60PW-M (Amass) | C98732 | 0.54 | 29k | module power edge + P2 output | | XT60PW-F (Amass) | C428722 | 0.56 | 8.4k | backplane, ×8 slots | | 2.54 header/socket strips | — | ~0.05 | ≫100k | slot signal rows, UART/SWD | -| TYPE-C-31-M-12 | C165948 | 0.16 | 336k | manager USB | +| GCT USB4105-GF-A | C3020560 | 1.30 | 1.1k at JLCPCB | manager USB (J3). 2026-09-28: matches the routed land. LCSC retail shows 0, JLCPCB assembly stock holds it; backup USB4105-GF-A-120 C5184243 (4.7k). The cheaper TYPE-C-31-M-12 C165948 has longer pads and would need the J3 breakout re-routed | | EC11E encoder with switch (Alps EC11E18244A5) | C255515 | 2.40 | 766 | 2026-09-27: the old "generic EC11" C2831776 was really a 100 µF/50 V electrolytic; no generic EC11 with switch is listed | | YX-SMD8530P SMD buzzer (Yuexin) | C781886 | 0.39 | 368 | 2026-09-27: replaces MLT-8530 C94599, which is rated 2.5–4.5 V but runs from 5V0; same vendor land, pad 1 (+) in the same corner | | ATO fuse holder | C3207132 | 0.42 | 997 | module 35 A | diff --git a/hardware/common/lcsc_parts.py b/hardware/common/lcsc_parts.py index 1f73351..16a2441 100644 --- a/hardware/common/lcsc_parts.py +++ b/hardware/common/lcsc_parts.py @@ -99,9 +99,12 @@ ({P2: ["J1", "J4"]}, "C98732", "XT60PW-M", "Amass", 0.54, ""), ({BP: ["J10", "J11", "J12", "J13", "J14", "J15", "J16", "J17"]}, "C428722", "XT60PW-F", "Amass", 0.56, ""), - ({MGR: ["J3"]}, "C165948", "TYPE-C-31-M-12", "Korean Hroparts", 0.16, - "CHECK: footprint is GCT USB4105 - swap to the TYPE-C-31-M-12 land " - "before ordering, or order a USB4105"), + # 2026-09-28: the board is routed to the USB4105 land, so order that part. + # LCSC shows 0 stock but JLCPCB assembly holds 1.1k; -120 (C5184243, 4.7k, + # longer shell stakes) is the backup. TYPE-C-31-M-12 needs a re-route. + ({MGR: ["J3"]}, "C3020560", "USB4105-GF-A", "Global Connector Technology", + 1.30, "stocked at JLCPCB assembly, not LCSC retail; backup " + "USB4105-GF-A-120 C5184243"), # C2831776 (the old "generic EC11") is a 100 uF/50 V electrolytic, and # the MLT-8530 is rated 2.5-4.5 V but hangs off 5V0 - replaced 2026-09-27. ({MGR: ["ENC1"]}, "C255515", "EC11E18244A5", "Alps Alpine", 2.40, diff --git a/hardware/phase3-manager/bom/phase3-manager-bom.csv b/hardware/phase3-manager/bom/phase3-manager-bom.csv index 09f7062..98d71da 100644 --- a/hardware/phase3-manager/bom/phase3-manager-bom.csv +++ b/hardware/phase3-manager/bom/phase3-manager-bom.csv @@ -14,7 +14,7 @@ Item,Qty,References,Value,Footprint,LCSC,MPN,Manufacturer,Unit USD,Ext USD,Note 13,1,ENC1,EC11,Rotary_Encoder:RotaryEncoder_Alps_EC11E-Switch_Vertical_H20mm,C255515,EC11E18244A5,Alps Alpine,2.4,2.4,EC11E with push switch; EasyEDA land A/B/C + D/E switch + 2 lugs matches the EC11E-Switch footprint 14,1,F1,2A mini blade,Fuse:Fuse_Blade_Mini_directSolder,C151091,0297002.WXNV,Littelfuse,0.11,0.11,"2 A MINI blade fuse, soldered directly into the land (no holder)" 15,1,J1,BACKPLANE,Connector_PinHeader_2.54mm:PinHeader_1x20_P2.54mm_Vertical,,,,,, -16,1,J3,USB-C,Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal,C165948,TYPE-C-31-M-12,Korean Hroparts,0.16,0.16,"CHECK: footprint is GCT USB4105 - swap to the TYPE-C-31-M-12 land before ordering, or order a USB4105" +16,1,J3,USB-C,Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal,C3020560,USB4105-GF-A,Global Connector Technology,1.3,1.3,"stocked at JLCPCB assembly, not LCSC retail; backup USB4105-GF-A-120 C5184243" 17,1,J4,UART,Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical,,,,,, 18,1,J5,PANEL KEYS,Connector_PinHeader_2.54mm:PinHeader_1x09_P2.54mm_Vertical,,,,,, 19,1,J6,ILI9341 LCD MODULE,Connector_PinHeader_2.54mm:PinHeader_1x14_P2.54mm_Vertical,,,,,,"ILI9341+XPT2046 2.8in module plugs here - AliExpress, confirm 3V3-VCC jumper" @@ -36,4 +36,4 @@ Item,Qty,References,Value,Footprint,LCSC,MPN,Manufacturer,Unit USD,Ext USD,Note 35,1,U11,TCAN1042HGV,Package_SO:SOIC-8_3.9x4.9mm_P1.27mm,C485806,TCAN1042VDRQ1,TI,0.57,0.57,"symbol value says TCAN1042HGV; SOURCING picked the V (VIO) variant, same SOIC-8 pinout" 36,1,U12,TPD2E001,Package_TO_SOT_SMD:Texas_R-PDSO-N5_DRL-5,C150526,TPD2E001DRLR,TI,0.16,0.16, 37,1,U13,TCA9535PWR,Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm,C130204,TCA9535PWR,TI,0.44,0.44,UMW clone acceptable here -,80,,,,,,,,11.36,"10/80 placements have an LCSC number; total covers those only (qty-1, SOURCING.md 2026-07-18)" +,80,,,,,,,,12.5,"10/80 placements have an LCSC number; total covers those only (qty-1, SOURCING.md 2026-07-18)" diff --git a/hardware/phase3-manager/bom/phase3-manager-jlcpcb.csv b/hardware/phase3-manager/bom/phase3-manager-jlcpcb.csv index c58163b..d7c0567 100644 --- a/hardware/phase3-manager/bom/phase3-manager-jlcpcb.csv +++ b/hardware/phase3-manager/bom/phase3-manager-jlcpcb.csv @@ -14,7 +14,7 @@ LED_CAN,D8,LED_0603_1608Metric, EC11,ENC1,RotaryEncoder_Alps_EC11E-Switch_Vertical_H20mm,C255515 2A mini blade,F1,Fuse_Blade_Mini_directSolder,C151091 BACKPLANE,J1,PinHeader_1x20_P2.54mm_Vertical, -USB-C,J3,USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal,C165948 +USB-C,J3,USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal,C3020560 UART,J4,PinHeader_1x03_P2.54mm_Vertical, PANEL KEYS,J5,PinHeader_1x09_P2.54mm_Vertical, ILI9341 LCD MODULE,J6,PinHeader_1x14_P2.54mm_Vertical, diff --git a/hardware/phase3-manager/mcu.kicad_sch b/hardware/phase3-manager/mcu.kicad_sch index a1d752d..2160e2d 100644 --- a/hardware/phase3-manager/mcu.kicad_sch +++ b/hardware/phase3-manager/mcu.kicad_sch @@ -1085,9 +1085,9 @@ (property "Value" "USB-C" (at 208.28 72.39 0) (effects (font (size 1.27 1.27)) (justify left))) (property "Footprint" "Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal" (at 190.5 96.52 0) (effects (font (size 1.27 1.27)) hide)) (property "Datasheet" "~" (at 190.5 96.52 0) (effects (font (size 1.27 1.27)) hide)) - (property "LCSC" "C165948" (at 190.5 96.52 0) (effects (font (size 1.27 1.27)) hide)) - (property "MPN" "TYPE-C-31-M-12" (at 190.5 96.52 0) (effects (font (size 1.27 1.27)) hide)) - (property "Manufacturer" "Korean Hroparts" (at 190.5 96.52 0) (effects (font (size 1.27 1.27)) hide)) + (property "LCSC" "C3020560" (at 190.5 96.52 0) (effects (font (size 1.27 1.27)) hide)) + (property "MPN" "USB4105-GF-A" (at 190.5 96.52 0) (effects (font (size 1.27 1.27)) hide)) + (property "Manufacturer" "Global Connector Technology" (at 190.5 96.52 0) (effects (font (size 1.27 1.27)) hide)) (pin "A1" (uuid 5fb886f1-5761-4f68-82e0-671fc5b94702)) (pin "A10" (uuid 2b3af121-85a3-4371-8bc4-7c8ef593d5d2)) (pin "A11" (uuid 6e3846f4-dbcc-4f7c-8ec9-c829c2cd5cf6)) diff --git a/hardware/phase3-manager/tools/route_critical.py b/hardware/phase3-manager/tools/route_critical.py index f473d1d..82362ac 100644 --- a/hardware/phase3-manager/tools/route_critical.py +++ b/hardware/phase3-manager/tools/route_critical.py @@ -22,8 +22,8 @@ B7-A7 with a U under it. 0.25 mm / 0.2 mm gap. Controlled 90-ohm impedance is not achievable on 1.6 mm two-layer stock and is not needed at full speed; the pair is kept coupled and matched instead. The J3 end - is tied to the USB4105 land pattern, and the USB-C part is still an open - choice: redraw it if the footprint changes. + is tied to the USB4105 land pattern (J3 = GCT USB4105-GF-A): redraw it + if the footprint changes. CAN (500 kbit/s): J1 pins 7/8 -> U11 pins 7/6, up the clear x~9 channel. U11 is turned 180 in gen_board.py so its bus pins face J1. The two nets