diff --git a/.github/workflows/build-rerun-sdk.yml b/.github/workflows/build-rerun-sdk.yml new file mode 100644 index 000000000..eb7d240f9 --- /dev/null +++ b/.github/workflows/build-rerun-sdk.yml @@ -0,0 +1,250 @@ +# SPDX-FileCopyrightText: 2026 The RISE Project +# SPDX-License-Identifier: MIT +--- +# Based on the `linux-x64` leg of upstream's own wheel pipeline: +# https://github.com/rerun-io/rerun/blob/0.37.1/.github/workflows/reusable_build_and_upload_wheels.yml +# (MODE=pr: `--no-default-features --features perf_telemetry,extension-module`, +# i.e. the crate's own default features -- no --features flags needed). +# +# Scope: this builds only the `rerun_bindings` Python SDK extension (rerun_py/), +# not the `rerun-cli` native viewer. Upstream's published wheel also bundles a +# prebuilt `rerun-cli` binary (a full wgpu/egui desktop+web viewer, built by a +# separate ~16-core job that itself needs a wasm/JS toolchain for the bundled +# web viewer) at rerun_sdk/rerun_cli/rerun; building that from source is out of +# scope here. rerun_py's own build.rs fails without it unless +# RERUN_ALLOW_MISSING_BIN is set (see below), and upstream's own +# `[tool.maturin] include` comment already documents that a missing binary is +# "not a packaging failure" -- `import rerun` and all logging/recording/gRPC +# APIs work; only `rerun.spawn()`/`serve()` and the `rerun` console script +# (which shell out to the bundled binary) raise a clear error instead of +# launching a viewer. +name: Build rerun-sdk wheels (riscv64) + +on: + workflow_dispatch: + inputs: + version: + description: 'rerun-sdk version to build (git tag, e.g. 0.37.1)' + required: true + default: '0.37.1' + pull_request: + paths: + - '.github/workflows/build-rerun-sdk.yml' + - 'patches/rerun-sdk/**' + +concurrency: + group: ${{ github.workflow }}-${{ inputs.version || '0.37.1' }}-${{ github.head_ref || github.run_id }} + cancel-in-progress: true + +permissions: + contents: read # to fetch code (actions/checkout) + +env: + # `inputs.version` is empty on pull_request events; default to 0.37.1 there. + RERUN_SDK_VERSION: ${{ inputs.version || '0.37.1' }} + MANYLINUX_RISCV64_IMAGE: quay.io/pypa/manylinux_2_39_riscv64 + +jobs: + setup: + uses: $/.github/workflows/_setup.yml + + build_wheels: + needs: [setup] + # pyo3 carries `abi3-py310` unconditionally in rerun_py/Cargo.toml, so + # upstream ships one cp310-abi3 wheel. Our registry has no riscv64 pyarrow + # (a hard runtime dependency) for cp310/cp311, so the build floor here is + # cp312 instead -- the wheel is still tagged cp310-abi3 by the pyo3 + # feature regardless of which interpreter compiles it (CLAUDE.md gotcha + # 96), it is simply never tested below cp312. + name: Build rerun-sdk ${{ inputs.version || '0.37.1' }} cp310-abi3-manylinux_riscv64 + runs-on: ubuntu-24.04-riscv + timeout-minutes: 1440 + + steps: + # rerun_py is a member of the rerun Cargo workspace (~760 crates on + # riscv64: datafusion, lance, tonic/tokio, hdf5-pure, ...) and builds + # against its sibling crates, so the checkout root has to be the + # workspace root, not rerun_py itself. + # lfs: true is required: the test suite's binary fixtures (HDF5, MP4, + # ...) are Git LFS pointers without it, and get fed straight into their + # native parsers -- "HDF5 signature not found" / "MP4 ... box with a + # larger size than it" is what that looks like from the Python side. + - name: Checkout rerun ${{ env.RERUN_SDK_VERSION }} + uses: actions/checkout@3d3c42e5aac5ba805825da76410c181273ba90b1 # v7.0.1 + with: + repository: rerun-io/rerun + ref: ${{ env.RERUN_SDK_VERSION }} + lfs: true + persist-credentials: false + + - name: Checkout python-wheels + uses: actions/checkout@3d3c42e5aac5ba805825da76410c181273ba90b1 # v7.0.1 + with: + path: python-wheels + persist-credentials: false + + # lance-core and lance-linalg 9.0.0 (build-dependencies of re_datafusion + # via lance) have per-arch SIMD structs/closures with cfg arms for + # aarch64/x86_64/loongarch64 and no catch-all, so they don't compile on + # riscv64: lance-core's SIMD-tier-detection closure evaluates to `()` + # instead of `SimdSupport` (E0308), and lance-linalg's f32x8/f32x16/ + # f64x4/f64x8/i32x8 types don't exist at all there (E0425) (CLAUDE.md + # gotchas 287/300). There is no compatible bugfix release to `cargo + # update` to, so riscv64-fixed copies are vendored here (the crates.io + # tarballs, already free of the workspace-inherited fields the git + # checkouts carry) and wired in via `[patch.crates-io]`. + - name: Vendor riscv64-fixed lance-core and lance-linalg + run: | + curl -fsSL -A "python-wheels (https://github.com/riseproject-dev/python-wheels)" -o lance-core.tar.gz https://crates.io/api/v1/crates/lance-core/9.0.0/download + mkdir lance-core-9.0.0-riscv64 + tar xzf lance-core.tar.gz -C lance-core-9.0.0-riscv64 --strip-components=1 + rm lance-core.tar.gz + patch -p1 -d lance-core-9.0.0-riscv64 < python-wheels/patches/rerun-sdk/${{ env.RERUN_SDK_VERSION }}/0001-lance-core-riscv64-simd-fallback.patch + + curl -fsSL -A "python-wheels (https://github.com/riseproject-dev/python-wheels)" -o lance-linalg.tar.gz https://crates.io/api/v1/crates/lance-linalg/9.0.0/download + mkdir lance-linalg-9.0.0-riscv64 + tar xzf lance-linalg.tar.gz -C lance-linalg-9.0.0-riscv64 --strip-components=1 + rm lance-linalg.tar.gz + patch -p1 -d lance-linalg-9.0.0-riscv64 < python-wheels/patches/rerun-sdk/${{ env.RERUN_SDK_VERSION }}/0003-lance-linalg-riscv64-simd-fallback.patch + + git apply python-wheels/patches/rerun-sdk/${{ env.RERUN_SDK_VERSION }}/0002-cargo-patch-lance-crates-for-riscv64.patch + + # This workspace links ~760 crates (datafusion, lance, tonic, hdf5-pure, + # ...) concurrently; same OOM guard build-deltalake.yml/ + # build-polars-runtime.yml need for a comparably sized Rust build. + - name: Set swap space + uses: pierotofy/set-swap-space@fc79b3f67fa8a838184ce84a674ca12238d2c761 # master + with: + swap-size-gb: 10 + + - name: Build wheel + uses: pypa/cibuildwheel@1828c10ab37f080699c7b81cea34097c684a7074 # v4.2.0 + with: + package-dir: rerun_py + output-dir: wheelhouse/ + # musllinux is dropped: rustup.rs ships no riscv64 musl toolchain. + # cp310/cp311 are dropped: our registry has no riscv64 pyarrow + # there (see the floor note above); cibuildwheel builds once on + # cp312 and re-tests the same abi3 wheel on cp313/cp314. + # Upstream ships no free-threaded wheel, so cp314t is not added. + env: + CIBW_BUILD: cp312-manylinux_riscv64 cp313-manylinux_riscv64 cp314-manylinux_riscv64 + CIBW_MANYLINUX_RISCV64_IMAGE: ${{ env.MANYLINUX_RISCV64_IMAGE }} + # rerun_py ships no [tool.cibuildwheel]; the Rust toolchain its + # maturin backend needs is installed in-container here. lance (a + # build-dependency of re_datafusion) needs protoc at build time to + # compile its manifest .proto files -- upstream's own before-build + # pulls a wheel-packaged protoc, which has no riscv64 build; Rocky + # 10's CRB repo (enabled in the image) has one (CLAUDE.md gotcha + # 100). + CIBW_BEFORE_ALL_LINUX: >- + curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- -y && + yum install -y protobuf-compiler protobuf-devel + # The repo's own .cargo/config.toml unconditionally points + # PYO3_CONFIG_FILE at rerun_py/pyo3-build.cfg for every cargo + # invocation, expecting a pixi activation hook to have generated it + # first; outside pixi it must be written by hand (upstream's own + # fallback: `python scripts/generate_pyo3_config.py`). abi3 pins the + # `version` field to 3.10 regardless of the interpreter that writes + # it, so which one runs this does not matter. + CIBW_BEFORE_BUILD_LINUX: | + python -c " + import sys; sys.path.insert(0, 'rerun_pixi_env/src') + from pathlib import Path + from rerun_pixi_env.pyo3_config import generate_config_file + generate_config_file(Path('rerun_py/pyo3-build.cfg'))" + CIBW_ENVIRONMENT_LINUX: >- + PATH="$PATH:$HOME/.cargo/bin" + PROTOC_INCLUDE=/usr/include + RERUN_ALLOW_MISSING_BIN=1 + CARGO_BUILD_JOBS=2 + PIP_EXTRA_INDEX_URL=https://pypi.riseproject.dev/simple/ + # Without this pip prefers PyPI's newer numpy/pillow/pandas/torch, + # none of which have riscv64 wheels, and falls back to slow source + # builds in the container (CLAUDE.md gotcha 12). + CIBW_TEST_ENVIRONMENT_LINUX: PIP_ONLY_BINARY=numpy,pillow,pandas,torch,pyarrow + # Subset of upstream's `tests` extra (pyproject.toml + # [project.optional-dependencies]) that has riscv64 wheels + # somewhere: av, torchvision, datafusion (the PyPI package) and + # polars publish none, so the handful of test files that need them + # are ignored below instead. opencv-python is on our registry as a + # cp37-abi3 wheel, forward-compatible with cp312+. + CIBW_TEST_REQUIRES: >- + pytest opencv-python>4.6 torch>=2.5 pandas>=2 + syrupy==5.0.0 inline-snapshot==0.31.1 semver>=3.0,<3.1 tomli==2.0.1 + # test-sources resolves against the checkout root, not package-dir. + # tests/assets is the workspace-level fixture dir test_asset3d.py + # reads via `Path(__file__).parents[3] / "tests" / "assets"`; the + # importer_mcap assets and the animated_urdf example data are the + # same shape for test_mcap_reader.py / test_urdf_tree.py. Cargo.toml + # is test_version.py's own fixture (it parses the workspace version + # straight out of it). + CIBW_TEST_SOURCES: >- + rerun_py/tests rerun_py/pyproject.toml tests/assets + crates/store/re_importer/src/importer_mcap/tests/assets + examples/rust/animated_urdf/data Cargo.toml + # e2e_redap_tests needs the "server" Cargo feature (not built, see + # the scope note above) to start its local catalog server. + # api_sandbox mixes in drafts of a future, unreleased API. Both are + # upstream-labelled sandboxes/integration suites, not the SDK's + # regression tests. test_headless_viewer.py spawns the (unbuilt) + # rerun-cli binary, same as test_rrd_reader_multi_store.py's + # session fixture (`rerun rrd merge`). test_server.py needs the + # `datafusion` Python package (no riscv64 wheel anywhere, same as + # test_datafusion_utils.py); the remaining ignored files all reach + # rerun.experimental.dataloader, whose decoders import torchvision + # or datafusion transitively. `-o markers=local_only` registers the + # mark e2e_redap_tests/conftest.py normally defines -- pytest only + # loads conftest.py files under the paths it actually collects, so + # excluding that directory drops the registration too and + # `filterwarnings = error` turns the resulting "unknown mark" + # warning into a collection failure. The deselected tests are + # single failures in otherwise-passing files, for the same three + # reasons (rerun-cli, av, datafusion) plus + # test_multiprocessing_gc, whose own comment says + # torch.multiprocessing (torch is on CIBW_TEST_REQUIRES) "causes + # more issues" than stdlib multiprocessing for this fork+gc race; + # it hits the test's 5s join() timeout consistently on this + # runner but not the reason any other test here was dropped -- + # deselect, don't chase (CLAUDE.md gotcha 14). + CIBW_TEST_COMMAND: >- + cd rerun_py && + python -c "import rerun_bindings.rerun_bindings as m; assert m.__file__.endswith('.so'), m.__file__" && + python -m pytest tests -v -o markers=local_only + --ignore=tests/e2e_redap_tests + --ignore=tests/api_sandbox + --ignore=tests/integration/test_headless_viewer.py + --ignore=tests/integration/test_dataloader_video.py + --ignore=tests/integration/test_dataloader_video_codecs.py + --ignore=tests/integration/test_chunk_store_reader.py + --ignore=tests/integration/test_rrd_reader_multi_store.py + --ignore=tests/unit/test_dataloader_decoder_helpers.py + --ignore=tests/unit/test_dataloader_manifest.py + --ignore=tests/unit/test_dataloader_query_indices.py + --ignore=tests/unit/test_dataloader_skip_incomplete.py + --ignore=tests/unit/test_sample_index.py + --ignore=tests/unit/test_datafusion_utils.py + --ignore=tests/unit/test_viewer_client.py + --ignore=tests/unit/test_server.py + --deselect=tests/integration/test_chunk_store.py::test_collect_optimize_video_stream_summary + --deselect=tests/integration/test_lazy_chunk_stream.py::test_identity_roundtrip + --deselect=tests/unit/test_binary_stream.py::test_binary_stream + --deselect=tests/unit/test_multi_stream.py::test_isolated_streams + --deselect=tests/unit/test_send_dataframe.py::test_send_dataframe_roundtrip + --deselect=tests/unit/test_multiprocessing_gc.py::test_multiprocessing_gc + + - uses: actions/upload-artifact@043fb46d1a93c77aae656e7c1c64a875d1fc6a0a # v7.0.1 + with: + name: rerun-sdk-${{ env.RERUN_SDK_VERSION }}-cp310-abi3-manylinux_riscv64 + path: wheelhouse/*.whl + if-no-files-found: error + + publish: + name: Publish rerun-sdk ${{ inputs.version || '0.37.1' }} + needs: [setup, build_wheels] + permissions: + contents: write + pull-requests: write + uses: $/.github/workflows/_publish-wheel.yml + with: + artifact-pattern: rerun-sdk-${{ inputs.version || '0.37.1' }}-*-manylinux_riscv64 diff --git a/patches/rerun-sdk/0.37.1/0001-lance-core-riscv64-simd-fallback.patch b/patches/rerun-sdk/0.37.1/0001-lance-core-riscv64-simd-fallback.patch new file mode 100644 index 000000000..9ed0d0083 --- /dev/null +++ b/patches/rerun-sdk/0.37.1/0001-lance-core-riscv64-simd-fallback.patch @@ -0,0 +1,22 @@ +Upstream-Status: To upstream [lance's own SIMD-tier cfg arms have no catch-all for architectures without a dedicated tier (riscv64 included); not filed upstream per this session's policy against opening external issues/PRs] + +--- a/src/utils/cpu.rs ++++ b/src/utils/cpu.rs +@@ -210,6 +210,17 @@ + SimdSupport::None + } + } ++ // riscv64 (and any other architecture without a dedicated tier above) has ++ // no SIMD kernels in lance yet; upstream's cfg arms have no catch-all, so ++ // this closure otherwise evaluates to `()` here instead of `SimdSupport`. ++ #[cfg(not(any( ++ target_arch = "aarch64", ++ target_arch = "x86_64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ SimdSupport::None ++ } + }); + + #[cfg(target_arch = "x86_64")] diff --git a/patches/rerun-sdk/0.37.1/0002-cargo-patch-lance-crates-for-riscv64.patch b/patches/rerun-sdk/0.37.1/0002-cargo-patch-lance-crates-for-riscv64.patch new file mode 100644 index 000000000..3f65c58c7 --- /dev/null +++ b/patches/rerun-sdk/0.37.1/0002-cargo-patch-lance-crates-for-riscv64.patch @@ -0,0 +1,37 @@ +Upstream-Status: Inappropriate [points at a directory this port's workflow materializes at runtime; not a fix rerun itself would carry] + +diff --git a/Cargo.lock b/Cargo.lock +index 52b6e5b..4e5ec02 100644 +--- a/Cargo.lock ++++ b/Cargo.lock +@@ -5622,8 +5622,6 @@ dependencies = [ + [[package]] + name = "lance-core" + version = "9.0.0" +-source = "registry+https://github.com/rust-lang/crates.io-index" +-checksum = "238c8a58308e7718d6bd96b53494eb7953fa299778bc4911cc571c3576e9446d" + dependencies = [ + "arrow-array", + "arrow-buffer", +@@ -5923,8 +5921,6 @@ dependencies = [ + [[package]] + name = "lance-linalg" + version = "9.0.0" +-source = "registry+https://github.com/rust-lang/crates.io-index" +-checksum = "0e5a9b99bd1f49bc2fe5afb81323141abc506c818f589de95dbab4f6143d9a88" + dependencies = [ + "arrow-array", + "arrow-buffer", +diff --git a/Cargo.toml b/Cargo.toml +index ac0093e..b2093a8 100644 +--- a/Cargo.toml ++++ b/Cargo.toml +@@ -845,6 +845,8 @@ self_named_module_files = "allow" # Disabled waiting on https://github.com/rust- + significant_drop_tightening = "allow" # An update of parking_lot made this trigger in a lot of places. TODO(emilk): fix those places + + [patch.crates-io] ++lance-core = { path = "lance-core-9.0.0-riscv64" } ++lance-linalg = { path = "lance-linalg-9.0.0-riscv64" } + # Try to avoid patching crates! It prevents us from publishing the crates on crates.io. + # If you do patch always prefer to patch to the trunk branch of the upstream repo (i.e. `main`, `master`, …). + # If that is not possible, patch to a branch that has a PR open on the upstream repo. diff --git a/patches/rerun-sdk/0.37.1/0003-lance-linalg-riscv64-simd-fallback.patch b/patches/rerun-sdk/0.37.1/0003-lance-linalg-riscv64-simd-fallback.patch new file mode 100644 index 000000000..03a3ed396 --- /dev/null +++ b/patches/rerun-sdk/0.37.1/0003-lance-linalg-riscv64-simd-fallback.patch @@ -0,0 +1,1400 @@ +Upstream-Status: To upstream [lance-linalg's per-arch SIMD structs (f32x8/f32x16/f64x4/f64x8/i32x8) have no fallback for architectures without a dedicated tier (riscv64 included); not filed upstream per this session's policy against opening external issues/PRs] + +--- lance-linalg-orig/src/simd/f32.rs 2006-07-24 03:21:28 ++++ lance-linalg-9.0.0-riscv64/src/simd/f32.rs 2026-09-07 02:16:55 +@@ -35,6 +35,17 @@ + #[derive(Clone, Copy)] + pub struct f32x8(v8f32); + ++/// 8 of 32-bit `f32` values. Portable scalar fallback for architectures with ++/// no dedicated SIMD tier above (riscv64 included) -- CLAUDE.md gotcha 300. ++#[allow(non_camel_case_types)] ++#[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++)))] ++#[derive(Clone, Copy)] ++pub struct f32x8([f32; 8]); ++ + impl std::fmt::Debug for f32x8 { + fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result { + let mut arr = [0.0_f32; 8]; +@@ -119,6 +130,27 @@ + ]; + Self::load_unaligned(values.as_ptr()) + } ++ ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ let ptr = slice.as_ptr(); ++ ++ let values = [ ++ *ptr.add(indices[0] as usize), ++ *ptr.add(indices[1] as usize), ++ *ptr.add(indices[2] as usize), ++ *ptr.add(indices[3] as usize), ++ *ptr.add(indices[4] as usize), ++ *ptr.add(indices[5] as usize), ++ *ptr.add(indices[6] as usize), ++ *ptr.add(indices[7] as usize), ++ ]; ++ Self::load_unaligned(values.as_ptr()) ++ } + } + } + +@@ -172,6 +204,14 @@ + unsafe { + Self(transmute(lasx_xvreplgr2vr_w(transmute(val)))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([val; 8]) ++ } + } + + fn zeros() -> Self { +@@ -186,6 +226,14 @@ + #[cfg(target_arch = "loongarch64")] + { + Self::splat(0.0) ++ } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([0.0; 8]) + } + } + +@@ -203,6 +251,14 @@ + { + Self(transmute(lasx_xvld::<0>(transmute(ptr)))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self::load_unaligned(ptr) ++ } + } + + #[inline] +@@ -219,6 +275,18 @@ + { + Self(transmute(lasx_xvld::<0>(transmute(ptr)))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 8]; ++ for (i, r) in result.iter_mut().enumerate() { ++ *r = unsafe { *ptr.add(i) }; ++ } ++ Self(result) ++ } + } + + unsafe fn store(&self, ptr: *mut f32) { +@@ -234,6 +302,14 @@ + unsafe { + lasx_xvst::<0>(transmute(self.0), transmute(ptr)); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ self.store_unaligned(ptr); ++ } + } + + unsafe fn store_unaligned(&self, ptr: *mut f32) { +@@ -249,6 +325,16 @@ + unsafe { + lasx_xvst::<0>(transmute(self.0), transmute(ptr)); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ for (i, v) in self.0.iter().enumerate() { ++ *ptr.add(i) = *v; ++ } ++ } + } + + #[inline] +@@ -277,6 +363,14 @@ + { + self.as_array().iter().sum() + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ self.0.iter().sum() ++ } + } + + fn reduce_min(&self) -> f32 { +@@ -311,6 +405,14 @@ + let m2 = lasx_xvfmin_s(transmute(m1), transmute(m2)); + transmute(lasx_xvpickve2gr_w::<0>(transmute(m2))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ self.0.iter().copied().fold(f32::INFINITY, f32::min) ++ } + } + + fn min(&self, rhs: &Self) -> Self { +@@ -329,6 +431,18 @@ + unsafe { + Self(lasx_xvfmin_s(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i].min(rhs.0[i]); ++ } ++ Self(result) ++ } + } + + fn find(&self, val: f32) -> Option { +@@ -362,6 +476,18 @@ + } + } + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ if self.0[i] == val { ++ return Some(i as i32); ++ } ++ } ++ } + None + } + } +@@ -380,6 +506,16 @@ + #[cfg(target_arch = "loongarch64")] + unsafe { + self.0 = lasx_xvfmadd_s(a.0, b.0, self.0); ++ } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ self.0[i] += a.0[i] * b.0[i]; ++ } + } + } + } +@@ -404,6 +540,18 @@ + unsafe { + Self(lasx_xvfadd_s(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i] + rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -423,6 +571,16 @@ + unsafe { + self.0 = lasx_xvfadd_s(self.0, rhs.0); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ self.0[i] += rhs.0[i]; ++ } ++ } + } + } + +@@ -446,6 +604,18 @@ + unsafe { + Self(lasx_xvfsub_s(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i] - rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -465,6 +635,16 @@ + unsafe { + self.0 = lasx_xvfsub_s(self.0, rhs.0); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ self.0[i] -= rhs.0[i]; ++ } ++ } + } + } + +@@ -488,6 +668,18 @@ + unsafe { + Self(lasx_xvfmul_s(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i] * rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -516,6 +708,16 @@ + #[derive(Clone, Copy)] + pub struct f32x16(v8f32, v8f32); + ++/// 16 of 32-bit `f32` values. Portable scalar fallback -- CLAUDE.md gotcha 300. ++#[allow(non_camel_case_types)] ++#[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++)))] ++#[derive(Clone, Copy)] ++pub struct f32x16([f32; 16]); ++ + impl std::fmt::Debug for f32x16 { + fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result { + let mut arr = [0.0_f32; 16]; +@@ -561,6 +763,14 @@ + transmute(lasx_xvreplgr2vr_w(transmute(val))), + ) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([val; 16]) ++ } + } + + #[inline] +@@ -577,6 +787,14 @@ + { + Self::splat(0.0) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([0.0; 16]) ++ } + } + + #[inline] +@@ -596,6 +814,14 @@ + transmute(lasx_xvld::<32>(transmute(ptr))), + ) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self::load_unaligned(ptr) ++ } + } + + #[inline] +@@ -614,6 +840,18 @@ + transmute(lasx_xvld::<0>(transmute(ptr))), + transmute(lasx_xvld::<32>(transmute(ptr))), + ) ++ } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 16]; ++ for (i, r) in result.iter_mut().enumerate() { ++ *r = unsafe { *ptr.add(i) }; ++ } ++ Self(result) + } + } + +@@ -633,6 +871,14 @@ + lasx_xvst::<0>(transmute(self.0), transmute(ptr)); + lasx_xvst::<32>(transmute(self.1), transmute(ptr)); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ self.store_unaligned(ptr); ++ } + } + + #[inline] +@@ -651,6 +897,16 @@ + lasx_xvst::<0>(transmute(self.0), transmute(ptr)); + lasx_xvst::<32>(transmute(self.1), transmute(ptr)); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ for (i, v) in self.0.iter().enumerate() { ++ *ptr.add(i) = *v; ++ } ++ } + } + + #[inline] +@@ -681,6 +937,14 @@ + { + self.as_array().iter().sum() + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ self.0.iter().sum() ++ } + } + + #[inline] +@@ -715,6 +979,14 @@ + let m1 = lasx_xvfmin_s(transmute(m1), transmute(m2)); + transmute(lasx_xvpickve2gr_w::<0>(transmute(m1))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ self.0.iter().copied().fold(f32::INFINITY, f32::min) ++ } + } + + #[inline] +@@ -736,6 +1008,18 @@ + unsafe { + Self(lasx_xvfmin_s(self.0, rhs.0), lasx_xvfmin_s(self.1, rhs.1)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 16]; ++ for i in 0..16 { ++ result[i] = self.0[i].min(rhs.0[i]); ++ } ++ Self(result) ++ } + } + + #[inline] +@@ -782,6 +1066,19 @@ + } + None + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..16 { ++ if self.0[i] == val { ++ return Some(i as i32); ++ } ++ } ++ None ++ } + } + } + +@@ -805,6 +1102,16 @@ + self.0 = lasx_xvfmadd_s(a.0, b.0, self.0); + self.1 = lasx_xvfmadd_s(a.1, b.1, self.1); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..16 { ++ self.0[i] += a.0[i] * b.0[i]; ++ } ++ } + } + } + +@@ -829,6 +1136,18 @@ + #[cfg(target_arch = "loongarch64")] + unsafe { + Self(lasx_xvfadd_s(self.0, rhs.0), lasx_xvfadd_s(self.1, rhs.1)) ++ } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 16]; ++ for i in 0..16 { ++ result[i] = self.0[i] + rhs.0[i]; ++ } ++ Self(result) + } + } + } +@@ -853,6 +1172,16 @@ + self.0 = lasx_xvfadd_s(self.0, rhs.0); + self.1 = lasx_xvfadd_s(self.1, rhs.1); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..16 { ++ self.0[i] += rhs.0[i]; ++ } ++ } + } + } + +@@ -877,6 +1206,18 @@ + #[cfg(target_arch = "loongarch64")] + unsafe { + Self(lasx_xvfmul_s(self.0, rhs.0), lasx_xvfmul_s(self.1, rhs.1)) ++ } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 16]; ++ for i in 0..16 { ++ result[i] = self.0[i] * rhs.0[i]; ++ } ++ Self(result) + } + } + } +@@ -903,6 +1244,18 @@ + unsafe { + Self(lasx_xvfsub_s(self.0, rhs.0), lasx_xvfsub_s(self.1, rhs.1)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f32; 16]; ++ for i in 0..16 { ++ result[i] = self.0[i] - rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -926,6 +1279,16 @@ + self.0 = lasx_xvfsub_s(self.0, rhs.0); + self.1 = lasx_xvfsub_s(self.1, rhs.1); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..16 { ++ self.0[i] -= rhs.0[i]; ++ } ++ } + } + } + +--- lance-linalg-orig/src/simd/f64.rs 2006-07-24 03:21:28 ++++ lance-linalg-9.0.0-riscv64/src/simd/f64.rs 2026-09-07 02:18:45 +@@ -33,6 +33,17 @@ + #[derive(Clone, Copy)] + pub struct f64x4(v4f64); + ++/// Portable scalar fallback for architectures with no dedicated SIMD tier ++/// above (riscv64 included) -- CLAUDE.md gotcha 300. ++#[allow(non_camel_case_types)] ++#[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++)))] ++#[derive(Clone, Copy)] ++pub struct f64x4([f64; 4]); ++ + impl std::fmt::Debug for f64x4 { + fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result { + let mut arr = [0.0_f64; 4]; +@@ -69,6 +80,14 @@ + unsafe { + Self(transmute(lasx_xvreplgr2vr_d(transmute(val)))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([val; 4]) ++ } + } + + fn zeros() -> Self { +@@ -84,6 +103,14 @@ + { + Self::splat(0.0) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([0.0; 4]) ++ } + } + + #[inline] +@@ -100,6 +127,14 @@ + { + Self(transmute(lasx_xvld::<0>(transmute(ptr)))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self::load_unaligned(ptr) ++ } + } + + #[inline] +@@ -116,6 +151,18 @@ + { + Self(transmute(lasx_xvld::<0>(transmute(ptr)))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 4]; ++ for (i, r) in result.iter_mut().enumerate() { ++ *r = unsafe { *ptr.add(i) }; ++ } ++ Self(result) ++ } + } + + unsafe fn store(&self, ptr: *mut f64) { +@@ -131,6 +178,14 @@ + unsafe { + lasx_xvst::<0>(transmute(self.0), transmute(ptr)); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ self.store_unaligned(ptr); ++ } + } + + unsafe fn store_unaligned(&self, ptr: *mut f64) { +@@ -146,6 +201,16 @@ + unsafe { + lasx_xvst::<0>(transmute(self.0), transmute(ptr)); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ for (i, v) in self.0.iter().enumerate() { ++ *ptr.add(i) = *v; ++ } ++ } + } + + #[inline] +@@ -169,6 +234,14 @@ + { + self.as_array().iter().sum() + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ self.0.iter().sum() ++ } + } + + fn reduce_min(&self) -> f64 { +@@ -194,6 +267,14 @@ + .copied() + .fold(f64::INFINITY, f64::min) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ self.0.iter().copied().fold(f64::INFINITY, f64::min) ++ } + } + + fn min(&self, rhs: &Self) -> Self { +@@ -212,6 +293,18 @@ + unsafe { + Self(lasx_xvfmin_d(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 4]; ++ for i in 0..4 { ++ result[i] = self.0[i].min(rhs.0[i]); ++ } ++ Self(result) ++ } + } + + fn find(&self, val: f64) -> Option { +@@ -241,6 +334,16 @@ + unsafe { + self.0 = lasx_xvfmadd_d(a.0, b.0, self.0); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..4 { ++ self.0[i] += a.0[i] * b.0[i]; ++ } ++ } + } + } + +@@ -264,6 +367,18 @@ + unsafe { + Self(lasx_xvfadd_d(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 4]; ++ for i in 0..4 { ++ result[i] = self.0[i] + rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -283,6 +398,16 @@ + unsafe { + self.0 = lasx_xvfadd_d(self.0, rhs.0); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..4 { ++ self.0[i] += rhs.0[i]; ++ } ++ } + } + } + +@@ -306,6 +431,18 @@ + unsafe { + Self(lasx_xvfsub_d(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 4]; ++ for i in 0..4 { ++ result[i] = self.0[i] - rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -325,6 +462,16 @@ + unsafe { + self.0 = lasx_xvfsub_d(self.0, rhs.0); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..4 { ++ self.0[i] -= rhs.0[i]; ++ } ++ } + } + } + +@@ -348,6 +495,18 @@ + unsafe { + Self(lasx_xvfmul_d(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 4]; ++ for i in 0..4 { ++ result[i] = self.0[i] * rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -377,6 +536,16 @@ + #[derive(Clone, Copy)] + pub struct f64x8(v4f64, v4f64); + ++/// Portable scalar fallback -- CLAUDE.md gotcha 300. ++#[allow(non_camel_case_types)] ++#[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++)))] ++#[derive(Clone, Copy)] ++pub struct f64x8([f64; 8]); ++ + impl std::fmt::Debug for f64x8 { + fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result { + let mut arr = [0.0_f64; 8]; +@@ -416,6 +585,14 @@ + let v = transmute(lasx_xvreplgr2vr_d(transmute(val))); + Self(v, v) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([val; 8]) ++ } + } + + #[inline] +@@ -432,6 +609,14 @@ + { + Self::splat(0.0) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([0.0; 8]) ++ } + } + + #[inline] +@@ -451,6 +636,14 @@ + transmute(lasx_xvld::<32>(transmute(ptr))), + ) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self::load_unaligned(ptr) ++ } + } + + #[inline] +@@ -470,6 +663,18 @@ + transmute(lasx_xvld::<32>(transmute(ptr))), + ) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 8]; ++ for (i, r) in result.iter_mut().enumerate() { ++ *r = unsafe { *ptr.add(i) }; ++ } ++ Self(result) ++ } + } + + #[inline] +@@ -489,6 +694,14 @@ + lasx_xvst::<0>(transmute(self.0), transmute(ptr)); + lasx_xvst::<32>(transmute(self.1), transmute(ptr)); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ self.store_unaligned(ptr); ++ } + } + + #[inline] +@@ -508,6 +721,16 @@ + lasx_xvst::<0>(transmute(self.0), transmute(ptr)); + lasx_xvst::<32>(transmute(self.1), transmute(ptr)); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ for (i, v) in self.0.iter().enumerate() { ++ *ptr.add(i) = *v; ++ } ++ } + } + + #[inline] +@@ -531,6 +754,14 @@ + { + self.as_array().iter().sum() + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ self.0.iter().sum() ++ } + } + + #[inline] +@@ -557,6 +788,14 @@ + .iter() + .copied() + .fold(f64::INFINITY, f64::min) ++ } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ self.0.iter().copied().fold(f64::INFINITY, f64::min) + } + } + +@@ -577,6 +816,18 @@ + unsafe { + Self(lasx_xvfmin_d(self.0, rhs.0), lasx_xvfmin_d(self.1, rhs.1)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i].min(rhs.0[i]); ++ } ++ Self(result) ++ } + } + + #[inline] +@@ -612,6 +863,16 @@ + self.0 = lasx_xvfmadd_d(a.0, b.0, self.0); + self.1 = lasx_xvfmadd_d(a.1, b.1, self.1); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ self.0[i] += a.0[i] * b.0[i]; ++ } ++ } + } + } + +@@ -635,6 +896,18 @@ + unsafe { + Self(lasx_xvfadd_d(self.0, rhs.0), lasx_xvfadd_d(self.1, rhs.1)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i] + rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -657,6 +930,16 @@ + unsafe { + self.0 = lasx_xvfadd_d(self.0, rhs.0); + self.1 = lasx_xvfadd_d(self.1, rhs.1); ++ } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ self.0[i] += rhs.0[i]; ++ } + } + } + } +@@ -681,6 +964,18 @@ + unsafe { + Self(lasx_xvfmul_d(self.0, rhs.0), lasx_xvfmul_d(self.1, rhs.1)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i] * rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -704,6 +999,18 @@ + unsafe { + Self(lasx_xvfsub_d(self.0, rhs.0), lasx_xvfsub_d(self.1, rhs.1)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0.0f64; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i] - rhs.0[i]; ++ } ++ Self(result) ++ } + } + } + +@@ -727,6 +1034,16 @@ + self.0 = lasx_xvfsub_d(self.0, rhs.0); + self.1 = lasx_xvfsub_d(self.1, rhs.1); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ self.0[i] -= rhs.0[i]; ++ } ++ } + } + } + +--- lance-linalg-orig/src/simd/i32.rs 2006-07-24 03:21:28 ++++ lance-linalg-9.0.0-riscv64/src/simd/i32.rs 2026-09-07 02:19:36 +@@ -30,6 +30,17 @@ + #[derive(Clone, Copy)] + pub struct i32x8(v8i32); + ++/// Portable scalar fallback for architectures with no dedicated SIMD tier ++/// above (riscv64 included) -- CLAUDE.md gotcha 300. ++#[allow(non_camel_case_types)] ++#[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++)))] ++#[derive(Clone, Copy)] ++pub struct i32x8(pub(crate) [i32; 8]); ++ + impl std::fmt::Debug for i32x8 { + fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result { + let mut arr = [0; 8]; +@@ -67,6 +78,14 @@ + unsafe { + Self(lasx_xvreplgr2vr_w(val)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([val; 8]) ++ } + } + + #[inline] +@@ -83,6 +102,14 @@ + { + Self::splat(0) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self([0; 8]) ++ } + } + + #[inline] +@@ -99,6 +126,14 @@ + { + Self(transmute(lasx_xvld::<0>(transmute(ptr)))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ Self::load_unaligned(ptr) ++ } + } + + #[inline] +@@ -115,6 +150,18 @@ + { + Self(transmute(lasx_xvld::<0>(transmute(ptr)))) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0i32; 8]; ++ for (i, r) in result.iter_mut().enumerate() { ++ *r = unsafe { *ptr.add(i) }; ++ } ++ Self(result) ++ } + } + + #[inline] +@@ -135,6 +182,16 @@ + unsafe { + lasx_xvst::<0>(transmute(self.0), transmute(ptr)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ unsafe { ++ for (i, v) in self.0.iter().enumerate() { ++ *ptr.add(i) = *v; ++ } ++ } + } + + fn reduce_sum(&self) -> i32 { +@@ -151,6 +208,14 @@ + { + self.as_array().iter().sum() + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ self.0.iter().sum() ++ } + } + + fn reduce_min(&self) -> i32 { +@@ -173,6 +238,18 @@ + unsafe { + Self(lasx_xvmin_w(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0i32; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i].min(rhs.0[i]); ++ } ++ Self(result) ++ } + } + + fn find(&self, val: i32) -> Option { +@@ -206,6 +283,18 @@ + } + } + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ if self.0[i] == val { ++ return Some(i as i32); ++ } ++ } ++ } + None + } + } +@@ -230,6 +319,18 @@ + unsafe { + Self(lasx_xvadd_w(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0i32; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i].wrapping_add(rhs.0[i]); ++ } ++ Self(result) ++ } + } + } + +@@ -249,6 +350,16 @@ + unsafe { + self.0 = lasx_xvadd_w(self.0, rhs.0); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ self.0[i] = self.0[i].wrapping_add(rhs.0[i]); ++ } ++ } + } + } + +@@ -272,6 +383,18 @@ + unsafe { + Self(lasx_xvsub_w(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0i32; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i].wrapping_sub(rhs.0[i]); ++ } ++ Self(result) ++ } + } + } + +@@ -291,6 +414,16 @@ + unsafe { + self.0 = lasx_xvsub_w(self.0, rhs.0); + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ for i in 0..8 { ++ self.0[i] = self.0[i].wrapping_sub(rhs.0[i]); ++ } ++ } + } + } + +@@ -314,6 +447,18 @@ + unsafe { + Self(lasx_xvmul_w(self.0, rhs.0)) + } ++ #[cfg(not(any( ++ target_arch = "x86_64", ++ target_arch = "aarch64", ++ target_arch = "loongarch64" ++ )))] ++ { ++ let mut result = [0i32; 8]; ++ for i in 0..8 { ++ result[i] = self.0[i].wrapping_mul(rhs.0[i]); ++ } ++ Self(result) ++ } + } + } +