From 388253ca4a6d192299a2e4a26fd89f387723bcb0 Mon Sep 17 00:00:00 2001 From: ChipSec Date: Tue, 16 Jun 2026 15:56:23 -0700 Subject: [PATCH] Update to release/2.0.5 Signed-off-by: ChipSec --- _sources/index.rst.txt | 4 +- .../chipsec.cfg.8086.pmc_i440fx.xml.rst.txt | 25 + _sources/modules/chipsec.cfg.8086.rst.txt | 1 + .../chipsec.cfg.parsers.ip.generic.rst.txt | 7 + .../modules/chipsec.cfg.parsers.ip.io.rst.txt | 7 + .../chipsec.cfg.parsers.ip.iobar.rst.txt | 7 + .../chipsec.cfg.parsers.ip.memory.rst.txt | 7 + .../chipsec.cfg.parsers.ip.mm_msgbus.rst.txt | 7 + .../chipsec.cfg.parsers.ip.mmio_bar.rst.txt | 7 + .../chipsec.cfg.parsers.ip.msgbus.rst.txt | 7 + .../chipsec.cfg.parsers.ip.msr.rst.txt | 7 + .../chipsec.cfg.parsers.ip.pci_device.rst.txt | 7 + .../chipsec.cfg.parsers.ip.platform.rst.txt | 7 + .../modules/chipsec.cfg.parsers.ip.rst.txt | 21 + ...sec.cfg.parsers.registers.controls.rst.txt | 7 + .../chipsec.cfg.parsers.registers.io.rst.txt | 7 + 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modules/chipsec.hal.amd.html create mode 100644 modules/chipsec.hal.amd.psp.html create mode 100644 modules/chipsec.hal.common.acpi.html create mode 100644 modules/chipsec.hal.common.cmos.html create mode 100644 modules/chipsec.hal.common.cpuid.html create mode 100644 modules/chipsec.hal.common.ec.html create mode 100644 modules/chipsec.hal.common.html create mode 100644 modules/chipsec.hal.common.interrupts.html create mode 100644 modules/chipsec.hal.common.io.html create mode 100644 modules/chipsec.hal.common.iobar.html create mode 100644 modules/chipsec.hal.common.iommu.html create mode 100644 modules/chipsec.hal.common.locks.html create mode 100644 modules/chipsec.hal.common.memrange.html create mode 100644 modules/chipsec.hal.common.mmio.html create mode 100644 modules/chipsec.hal.common.msr.html create mode 100644 modules/chipsec.hal.common.pci.html create mode 100644 modules/chipsec.hal.common.physmem.html create mode 100644 modules/chipsec.hal.common.smbios.html create mode 100644 modules/chipsec.hal.common.smbus.html create mode 100644 modules/chipsec.hal.common.spd.html create mode 100644 modules/chipsec.hal.common.tpm.html create mode 100644 modules/chipsec.hal.common.uefi.html create mode 100644 modules/chipsec.hal.common.virtmem.html create mode 100644 modules/chipsec.hal.common.vmm.html create mode 100644 modules/chipsec.hal.intel.cpu.html create mode 100644 modules/chipsec.hal.intel.html create mode 100644 modules/chipsec.hal.intel.igd.html create mode 100644 modules/chipsec.hal.intel.mm_msgbus.html create mode 100644 modules/chipsec.hal.intel.mmcfg.html create mode 100644 modules/chipsec.hal.intel.msgbus.html create mode 100644 modules/chipsec.hal.intel.spi.html create mode 100644 modules/chipsec.hal.intel.spi_descriptor.html create mode 100644 modules/chipsec.hal.intel.ucode.html create mode 100644 modules/chipsec.helper.record.html create mode 100644 modules/chipsec.helper.record.recordhelper.html create mode 100644 modules/chipsec.helper.replay.html create mode 100644 modules/chipsec.helper.replay.replayhelper.html create mode 100644 modules/chipsec.library.intel.html create mode 100644 modules/chipsec.library.intel.spi.html create mode 100644 modules/chipsec.library.intel.spi_descriptor_cfgs.html create mode 100644 modules/chipsec.library.intel.vmm_common.html create mode 100644 modules/chipsec.library.registers.baseregister.html create mode 100644 modules/chipsec.library.registers.html create mode 100644 modules/chipsec.library.registers.io.html create mode 100644 modules/chipsec.library.registers.iobar.html create mode 100644 modules/chipsec.library.registers.memory.html create mode 100644 modules/chipsec.library.registers.mm_msgbus.html create mode 100644 modules/chipsec.library.registers.mmcfg.html create mode 100644 modules/chipsec.library.registers.mmio.html create mode 100644 modules/chipsec.library.registers.msgbus.html create mode 100644 modules/chipsec.library.registers.msr.html create mode 100644 modules/chipsec.library.registers.pcicfg.html create mode 100644 modules/chipsec.library.uefi.common.html create mode 100644 modules/chipsec.library.uefi.compression.html create mode 100644 modules/chipsec.library.uefi.fv.html create mode 100644 modules/chipsec.library.uefi.html create mode 100644 modules/chipsec.library.uefi.platform.html create mode 100644 modules/chipsec.library.uefi.search.html create mode 100644 modules/chipsec.library.uefi.sleep_states.html create mode 100644 modules/chipsec.library.uefi.spi.html create mode 100644 modules/chipsec.library.uefi.variables.html create mode 100644 modules/chipsec.library.uefi.varstore.html diff --git a/_sources/index.rst.txt b/_sources/index.rst.txt index 5e98c40d..ec6bed20 100644 --- a/_sources/index.rst.txt +++ b/_sources/index.rst.txt @@ -1,9 +1,9 @@ -.. CHIPSEC 2.0.3 documentation file, created by +.. CHIPSEC 2.0.5 documentation file, created by sphinx-quickstart on Wed Mar 25 13:24:44 2015. You can adapt this file completely to your liking, but it should at least contain the root `toctree` directive. -CHIPSEC 2.0.3 +CHIPSEC 2.0.5 ============= CHIPSEC is a framework for analyzing platform level security of diff --git a/_sources/modules/chipsec.cfg.8086.pmc_i440fx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pmc_i440fx.xml.rst.txt new file mode 100644 index 00000000..1c44bcdc --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pmc_i440fx.xml.rst.txt @@ -0,0 +1,25 @@ +pmc_i440fx +============== + +Path: chipsec\\cfg\\8086\\pmc_i440fx.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2026, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.rst.txt b/_sources/modules/chipsec.cfg.8086.rst.txt index 87c600b3..09abd48d 100644 --- a/_sources/modules/chipsec.cfg.8086.rst.txt +++ b/_sources/modules/chipsec.cfg.8086.rst.txt @@ -3,6 +3,7 @@ chipsec.cfg.8086.arl.xml.rst chipsec.cfg.8086.pch_3xxlp_orig.xmls.rst chipsec.cfg.8086.kbl_orig.xmls.rst + chipsec.cfg.8086.pmc_i440fx.xml.rst chipsec.cfg.8086.tglu.xml.rst chipsec.cfg.8086.kbl.xml.rst chipsec.cfg.8086.lnl.xml.rst diff --git a/_sources/modules/chipsec.cfg.parsers.ip.generic.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.generic.rst.txt new file mode 100644 index 00000000..4fc6ae63 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.generic.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.generic module +===================================== + +.. automodule:: chipsec.cfg.parsers.ip.generic + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.io.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.io.rst.txt new file mode 100644 index 00000000..141ad2c0 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.io.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.io module +================================ + +.. automodule:: chipsec.cfg.parsers.ip.io + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.iobar.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.iobar.rst.txt new file mode 100644 index 00000000..fe2e8856 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.iobar.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.iobar module +=================================== + +.. automodule:: chipsec.cfg.parsers.ip.iobar + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.memory.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.memory.rst.txt new file mode 100644 index 00000000..93bb7f84 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.memory.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.memory module +==================================== + +.. automodule:: chipsec.cfg.parsers.ip.memory + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.mm_msgbus.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.mm_msgbus.rst.txt new file mode 100644 index 00000000..bf76e8e0 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.mm_msgbus.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.mm\_msgbus module +======================================== + +.. automodule:: chipsec.cfg.parsers.ip.mm_msgbus + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.mmio_bar.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.mmio_bar.rst.txt new file mode 100644 index 00000000..b388d5c4 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.mmio_bar.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.mmio\_bar module +======================================= + +.. automodule:: chipsec.cfg.parsers.ip.mmio_bar + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.msgbus.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.msgbus.rst.txt new file mode 100644 index 00000000..757d5cf9 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.msgbus.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.msgbus module +==================================== + +.. automodule:: chipsec.cfg.parsers.ip.msgbus + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.msr.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.msr.rst.txt new file mode 100644 index 00000000..269509f8 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.msr.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.msr module +================================= + +.. automodule:: chipsec.cfg.parsers.ip.msr + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.pci_device.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.pci_device.rst.txt new file mode 100644 index 00000000..c260bb07 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.pci_device.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.pci\_device module +========================================= + +.. automodule:: chipsec.cfg.parsers.ip.pci_device + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.platform.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.platform.rst.txt new file mode 100644 index 00000000..bb68d411 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.platform.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.ip.platform module +====================================== + +.. automodule:: chipsec.cfg.parsers.ip.platform + + + diff --git a/_sources/modules/chipsec.cfg.parsers.ip.rst.txt b/_sources/modules/chipsec.cfg.parsers.ip.rst.txt new file mode 100644 index 00000000..ad78cd66 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.ip.rst.txt @@ -0,0 +1,21 @@ +chipsec.cfg.parsers.ip package +============================== + +.. toctree:: + :maxdepth: 10 + + chipsec.cfg.parsers.ip.generic + chipsec.cfg.parsers.ip.io + chipsec.cfg.parsers.ip.iobar + chipsec.cfg.parsers.ip.memory + chipsec.cfg.parsers.ip.mm_msgbus + chipsec.cfg.parsers.ip.mmio_bar + chipsec.cfg.parsers.ip.msgbus + chipsec.cfg.parsers.ip.msr + chipsec.cfg.parsers.ip.pci_device + chipsec.cfg.parsers.ip.platform + +.. automodule:: chipsec.cfg.parsers.ip + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.controls.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.controls.rst.txt new file mode 100644 index 00000000..1ae4f4e0 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.controls.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.controls module +============================================= + +.. automodule:: chipsec.cfg.parsers.registers.controls + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.io.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.io.rst.txt new file mode 100644 index 00000000..4b0bb602 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.io.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.io module +======================================= + +.. automodule:: chipsec.cfg.parsers.registers.io + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.iobar.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.iobar.rst.txt new file mode 100644 index 00000000..39ce86bb --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.iobar.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.iobar module +========================================== + +.. automodule:: chipsec.cfg.parsers.registers.iobar + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.locks.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.locks.rst.txt new file mode 100644 index 00000000..12785dce --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.locks.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.locks module +========================================== + +.. automodule:: chipsec.cfg.parsers.registers.locks + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.memory.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.memory.rst.txt new file mode 100644 index 00000000..c9a8860c --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.memory.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.memory module +=========================================== + +.. automodule:: chipsec.cfg.parsers.registers.memory + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.mm_msgbus.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.mm_msgbus.rst.txt new file mode 100644 index 00000000..9c62939b --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.mm_msgbus.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.mm\_msgbus module +=============================================== + +.. automodule:: chipsec.cfg.parsers.registers.mm_msgbus + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.mmcfg.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.mmcfg.rst.txt new file mode 100644 index 00000000..8aa30e36 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.mmcfg.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.mmcfg module +========================================== + +.. automodule:: chipsec.cfg.parsers.registers.mmcfg + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.mmio.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.mmio.rst.txt new file mode 100644 index 00000000..e8bdcea2 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.mmio.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.mmio module +========================================= + +.. automodule:: chipsec.cfg.parsers.registers.mmio + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.msgbus.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.msgbus.rst.txt new file mode 100644 index 00000000..47bf84ad --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.msgbus.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.msgbus module +=========================================== + +.. automodule:: chipsec.cfg.parsers.registers.msgbus + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.msr.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.msr.rst.txt new file mode 100644 index 00000000..8e3537ab --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.msr.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.msr module +======================================== + +.. automodule:: chipsec.cfg.parsers.registers.msr + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.pci.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.pci.rst.txt new file mode 100644 index 00000000..db2068a7 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.pci.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.pci module +======================================== + +.. automodule:: chipsec.cfg.parsers.registers.pci + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.rst.txt new file mode 100644 index 00000000..fae24336 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.rst.txt @@ -0,0 +1,23 @@ +chipsec.cfg.parsers.registers package +===================================== + +.. toctree:: + :maxdepth: 10 + + chipsec.cfg.parsers.registers.controls + chipsec.cfg.parsers.registers.io + chipsec.cfg.parsers.registers.iobar + chipsec.cfg.parsers.registers.locks + chipsec.cfg.parsers.registers.memory + chipsec.cfg.parsers.registers.mm_msgbus + chipsec.cfg.parsers.registers.mmcfg + chipsec.cfg.parsers.registers.mmio + chipsec.cfg.parsers.registers.msgbus + chipsec.cfg.parsers.registers.msr + chipsec.cfg.parsers.registers.pci + chipsec.cfg.parsers.registers.simple + +.. automodule:: chipsec.cfg.parsers.registers + + + diff --git a/_sources/modules/chipsec.cfg.parsers.registers.simple.rst.txt b/_sources/modules/chipsec.cfg.parsers.registers.simple.rst.txt new file mode 100644 index 00000000..e3e1a758 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.registers.simple.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.registers.simple module +=========================================== + +.. automodule:: chipsec.cfg.parsers.registers.simple + + + diff --git a/_sources/modules/chipsec.hal.amd.cpu.rst.txt b/_sources/modules/chipsec.hal.amd.cpu.rst.txt new file mode 100644 index 00000000..20d2415a --- /dev/null +++ b/_sources/modules/chipsec.hal.amd.cpu.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.amd.cpu module +========================== + +.. automodule:: chipsec.hal.amd.cpu + + + diff --git a/_sources/modules/chipsec.hal.amd.psp.rst.txt b/_sources/modules/chipsec.hal.amd.psp.rst.txt new file mode 100644 index 00000000..cf661abc --- /dev/null +++ b/_sources/modules/chipsec.hal.amd.psp.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.amd.psp module +========================== + +.. automodule:: chipsec.hal.amd.psp + + + diff --git a/_sources/modules/chipsec.hal.amd.rst.txt b/_sources/modules/chipsec.hal.amd.rst.txt new file mode 100644 index 00000000..dd4b4d77 --- /dev/null +++ b/_sources/modules/chipsec.hal.amd.rst.txt @@ -0,0 +1,13 @@ +chipsec.hal.amd package +======================= + +.. toctree:: + :maxdepth: 10 + + chipsec.hal.amd.cpu + chipsec.hal.amd.psp + +.. automodule:: chipsec.hal.amd + + + diff --git a/_sources/modules/chipsec.hal.common.acpi.rst.txt b/_sources/modules/chipsec.hal.common.acpi.rst.txt new file mode 100644 index 00000000..302d9146 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.acpi.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.acpi module +============================== + +.. automodule:: chipsec.hal.common.acpi + + + diff --git a/_sources/modules/chipsec.hal.common.cmos.rst.txt b/_sources/modules/chipsec.hal.common.cmos.rst.txt new file mode 100644 index 00000000..956aea3e --- /dev/null +++ b/_sources/modules/chipsec.hal.common.cmos.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.cmos module +============================== + +.. automodule:: chipsec.hal.common.cmos + + + diff --git a/_sources/modules/chipsec.hal.common.cpuid.rst.txt b/_sources/modules/chipsec.hal.common.cpuid.rst.txt new file mode 100644 index 00000000..614fb2a7 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.cpuid.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.cpuid module +=============================== + +.. automodule:: chipsec.hal.common.cpuid + + + diff --git a/_sources/modules/chipsec.hal.common.ec.rst.txt b/_sources/modules/chipsec.hal.common.ec.rst.txt new file mode 100644 index 00000000..dd9cffad --- /dev/null +++ b/_sources/modules/chipsec.hal.common.ec.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.ec module +============================ + +.. automodule:: chipsec.hal.common.ec + + + diff --git a/_sources/modules/chipsec.hal.common.interrupts.rst.txt b/_sources/modules/chipsec.hal.common.interrupts.rst.txt new file mode 100644 index 00000000..3d3d7a2c --- /dev/null +++ b/_sources/modules/chipsec.hal.common.interrupts.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.interrupts module +==================================== + +.. automodule:: chipsec.hal.common.interrupts + + + diff --git a/_sources/modules/chipsec.hal.common.io.rst.txt b/_sources/modules/chipsec.hal.common.io.rst.txt new file mode 100644 index 00000000..42bd95f0 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.io.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.io module +============================ + +.. automodule:: chipsec.hal.common.io + + + diff --git a/_sources/modules/chipsec.hal.common.iobar.rst.txt b/_sources/modules/chipsec.hal.common.iobar.rst.txt new file mode 100644 index 00000000..b3de57c3 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.iobar.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.iobar module +=============================== + +.. automodule:: chipsec.hal.common.iobar + + + diff --git a/_sources/modules/chipsec.hal.common.iommu.rst.txt b/_sources/modules/chipsec.hal.common.iommu.rst.txt new file mode 100644 index 00000000..715a0c5c --- /dev/null +++ b/_sources/modules/chipsec.hal.common.iommu.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.iommu module +=============================== + +.. automodule:: chipsec.hal.common.iommu + + + diff --git a/_sources/modules/chipsec.hal.common.locks.rst.txt b/_sources/modules/chipsec.hal.common.locks.rst.txt new file mode 100644 index 00000000..4f81a90c --- /dev/null +++ b/_sources/modules/chipsec.hal.common.locks.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.locks module +=============================== + +.. automodule:: chipsec.hal.common.locks + + + diff --git a/_sources/modules/chipsec.hal.common.memrange.rst.txt b/_sources/modules/chipsec.hal.common.memrange.rst.txt new file mode 100644 index 00000000..ba7d5d41 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.memrange.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.memrange module +================================== + +.. automodule:: chipsec.hal.common.memrange + + + diff --git a/_sources/modules/chipsec.hal.common.mmio.rst.txt b/_sources/modules/chipsec.hal.common.mmio.rst.txt new file mode 100644 index 00000000..361c39b2 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.mmio.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.mmio module +============================== + +.. automodule:: chipsec.hal.common.mmio + + + diff --git a/_sources/modules/chipsec.hal.common.msr.rst.txt b/_sources/modules/chipsec.hal.common.msr.rst.txt new file mode 100644 index 00000000..22487c4c --- /dev/null +++ b/_sources/modules/chipsec.hal.common.msr.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.msr module +============================= + +.. automodule:: chipsec.hal.common.msr + + + diff --git a/_sources/modules/chipsec.hal.common.pci.rst.txt b/_sources/modules/chipsec.hal.common.pci.rst.txt new file mode 100644 index 00000000..89d79a01 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.pci.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.pci module +============================= + +.. automodule:: chipsec.hal.common.pci + + + diff --git a/_sources/modules/chipsec.hal.common.physmem.rst.txt b/_sources/modules/chipsec.hal.common.physmem.rst.txt new file mode 100644 index 00000000..0de72a84 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.physmem.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.physmem module +================================= + +.. automodule:: chipsec.hal.common.physmem + + + diff --git a/_sources/modules/chipsec.hal.common.rst.txt b/_sources/modules/chipsec.hal.common.rst.txt new file mode 100644 index 00000000..9be63121 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.rst.txt @@ -0,0 +1,32 @@ +chipsec.hal.common package +========================== + +.. toctree:: + :maxdepth: 10 + + chipsec.hal.common.acpi + chipsec.hal.common.cmos + chipsec.hal.common.cpuid + chipsec.hal.common.ec + chipsec.hal.common.interrupts + chipsec.hal.common.io + chipsec.hal.common.iobar + chipsec.hal.common.iommu + chipsec.hal.common.locks + chipsec.hal.common.memrange + chipsec.hal.common.mmio + chipsec.hal.common.msr + chipsec.hal.common.pci + chipsec.hal.common.physmem + chipsec.hal.common.smbios + chipsec.hal.common.smbus + chipsec.hal.common.spd + chipsec.hal.common.tpm + chipsec.hal.common.uefi + chipsec.hal.common.virtmem + chipsec.hal.common.vmm + +.. automodule:: chipsec.hal.common + + + diff --git a/_sources/modules/chipsec.hal.common.smbios.rst.txt b/_sources/modules/chipsec.hal.common.smbios.rst.txt new file mode 100644 index 00000000..dd104179 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.smbios.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.smbios module +================================ + +.. automodule:: chipsec.hal.common.smbios + + + diff --git a/_sources/modules/chipsec.hal.common.smbus.rst.txt b/_sources/modules/chipsec.hal.common.smbus.rst.txt new file mode 100644 index 00000000..7d8f0329 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.smbus.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.smbus module +=============================== + +.. automodule:: chipsec.hal.common.smbus + + + diff --git a/_sources/modules/chipsec.hal.common.spd.rst.txt b/_sources/modules/chipsec.hal.common.spd.rst.txt new file mode 100644 index 00000000..04c116cc --- /dev/null +++ b/_sources/modules/chipsec.hal.common.spd.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.spd module +============================= + +.. automodule:: chipsec.hal.common.spd + + + diff --git a/_sources/modules/chipsec.hal.common.tpm.rst.txt b/_sources/modules/chipsec.hal.common.tpm.rst.txt new file mode 100644 index 00000000..f4217088 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.tpm.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.tpm module +============================= + +.. automodule:: chipsec.hal.common.tpm + + + diff --git a/_sources/modules/chipsec.hal.common.uefi.rst.txt b/_sources/modules/chipsec.hal.common.uefi.rst.txt new file mode 100644 index 00000000..62ec12c5 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.uefi.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.uefi module +============================== + +.. automodule:: chipsec.hal.common.uefi + + + diff --git a/_sources/modules/chipsec.hal.common.virtmem.rst.txt b/_sources/modules/chipsec.hal.common.virtmem.rst.txt new file mode 100644 index 00000000..ca59bfb0 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.virtmem.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.virtmem module +================================= + +.. automodule:: chipsec.hal.common.virtmem + + + diff --git a/_sources/modules/chipsec.hal.common.vmm.rst.txt b/_sources/modules/chipsec.hal.common.vmm.rst.txt new file mode 100644 index 00000000..bafe60c4 --- /dev/null +++ b/_sources/modules/chipsec.hal.common.vmm.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.common.vmm module +============================= + +.. automodule:: chipsec.hal.common.vmm + + + diff --git a/_sources/modules/chipsec.hal.intel.cpu.rst.txt b/_sources/modules/chipsec.hal.intel.cpu.rst.txt new file mode 100644 index 00000000..2c41d531 --- /dev/null +++ b/_sources/modules/chipsec.hal.intel.cpu.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.intel.cpu module +============================ + +.. automodule:: chipsec.hal.intel.cpu + + + diff --git a/_sources/modules/chipsec.hal.intel.igd.rst.txt b/_sources/modules/chipsec.hal.intel.igd.rst.txt new file mode 100644 index 00000000..3fb76db7 --- /dev/null +++ b/_sources/modules/chipsec.hal.intel.igd.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.intel.igd module +============================ + +.. automodule:: chipsec.hal.intel.igd + + + diff --git a/_sources/modules/chipsec.hal.intel.mm_msgbus.rst.txt b/_sources/modules/chipsec.hal.intel.mm_msgbus.rst.txt new file mode 100644 index 00000000..4a1c23c2 --- /dev/null +++ b/_sources/modules/chipsec.hal.intel.mm_msgbus.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.intel.mm\_msgbus module +=================================== + +.. automodule:: chipsec.hal.intel.mm_msgbus + + + diff --git a/_sources/modules/chipsec.hal.intel.mmcfg.rst.txt b/_sources/modules/chipsec.hal.intel.mmcfg.rst.txt new file mode 100644 index 00000000..2930be71 --- /dev/null +++ b/_sources/modules/chipsec.hal.intel.mmcfg.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.intel.mmcfg module +============================== + +.. automodule:: chipsec.hal.intel.mmcfg + + + diff --git a/_sources/modules/chipsec.hal.intel.msgbus.rst.txt b/_sources/modules/chipsec.hal.intel.msgbus.rst.txt new file mode 100644 index 00000000..8d888eeb --- /dev/null +++ b/_sources/modules/chipsec.hal.intel.msgbus.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.intel.msgbus module +=============================== + +.. automodule:: chipsec.hal.intel.msgbus + + + diff --git a/_sources/modules/chipsec.hal.intel.rst.txt b/_sources/modules/chipsec.hal.intel.rst.txt new file mode 100644 index 00000000..2130e277 --- /dev/null +++ b/_sources/modules/chipsec.hal.intel.rst.txt @@ -0,0 +1,19 @@ +chipsec.hal.intel package +========================= + +.. toctree:: + :maxdepth: 10 + + chipsec.hal.intel.cpu + chipsec.hal.intel.igd + chipsec.hal.intel.mm_msgbus + chipsec.hal.intel.mmcfg + chipsec.hal.intel.msgbus + chipsec.hal.intel.spi + chipsec.hal.intel.spi_descriptor + chipsec.hal.intel.ucode + +.. automodule:: chipsec.hal.intel + + + diff --git a/_sources/modules/chipsec.hal.intel.spi.rst.txt b/_sources/modules/chipsec.hal.intel.spi.rst.txt new file mode 100644 index 00000000..b61c42e2 --- /dev/null +++ b/_sources/modules/chipsec.hal.intel.spi.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.intel.spi module +============================ + +.. automodule:: chipsec.hal.intel.spi + + + diff --git a/_sources/modules/chipsec.hal.intel.spi_descriptor.rst.txt b/_sources/modules/chipsec.hal.intel.spi_descriptor.rst.txt new file mode 100644 index 00000000..78b5085b --- /dev/null +++ b/_sources/modules/chipsec.hal.intel.spi_descriptor.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.intel.spi\_descriptor module +======================================== + +.. automodule:: chipsec.hal.intel.spi_descriptor + + + diff --git a/_sources/modules/chipsec.hal.intel.ucode.rst.txt b/_sources/modules/chipsec.hal.intel.ucode.rst.txt new file mode 100644 index 00000000..6ac446f9 --- /dev/null +++ b/_sources/modules/chipsec.hal.intel.ucode.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.intel.ucode module +============================== + +.. automodule:: chipsec.hal.intel.ucode + + + diff --git a/_sources/modules/chipsec.hal.rst.txt b/_sources/modules/chipsec.hal.rst.txt index 361bad40..79c0d1ee 100644 --- a/_sources/modules/chipsec.hal.rst.txt +++ b/_sources/modules/chipsec.hal.rst.txt @@ -1,6 +1,13 @@ chipsec.hal package =================== +.. toctree:: + :maxdepth: 10 + + chipsec.hal.amd + chipsec.hal.common + chipsec.hal.intel + .. toctree:: :maxdepth: 10 diff --git a/_sources/modules/chipsec.helper.record.recordhelper.rst.txt b/_sources/modules/chipsec.helper.record.recordhelper.rst.txt new file mode 100644 index 00000000..be53b727 --- /dev/null +++ b/_sources/modules/chipsec.helper.record.recordhelper.rst.txt @@ -0,0 +1,7 @@ +chipsec.helper.record.recordhelper module +========================================= + +.. automodule:: chipsec.helper.record.recordhelper + + + diff --git a/_sources/modules/chipsec.helper.record.rst.txt b/_sources/modules/chipsec.helper.record.rst.txt new file mode 100644 index 00000000..7b556b14 --- /dev/null +++ b/_sources/modules/chipsec.helper.record.rst.txt @@ -0,0 +1,12 @@ +chipsec.helper.record package +============================= + +.. toctree:: + :maxdepth: 10 + + chipsec.helper.record.recordhelper + +.. automodule:: chipsec.helper.record + + + diff --git a/_sources/modules/chipsec.helper.replay.replayhelper.rst.txt b/_sources/modules/chipsec.helper.replay.replayhelper.rst.txt new file mode 100644 index 00000000..b67f659e --- /dev/null +++ b/_sources/modules/chipsec.helper.replay.replayhelper.rst.txt @@ -0,0 +1,7 @@ +chipsec.helper.replay.replayhelper module +========================================= + +.. automodule:: chipsec.helper.replay.replayhelper + + + diff --git a/_sources/modules/chipsec.helper.replay.rst.txt b/_sources/modules/chipsec.helper.replay.rst.txt new file mode 100644 index 00000000..2ebdb723 --- /dev/null +++ b/_sources/modules/chipsec.helper.replay.rst.txt @@ -0,0 +1,12 @@ +chipsec.helper.replay package +============================= + +.. toctree:: + :maxdepth: 10 + + chipsec.helper.replay.replayhelper + +.. automodule:: chipsec.helper.replay + + + diff --git a/_sources/modules/chipsec.helper.rst.txt b/_sources/modules/chipsec.helper.rst.txt index e91bd8c5..93feebf2 100644 --- a/_sources/modules/chipsec.helper.rst.txt +++ b/_sources/modules/chipsec.helper.rst.txt @@ -8,6 +8,8 @@ chipsec.helper package chipsec.helper.efi chipsec.helper.linux chipsec.helper.linuxnative + chipsec.helper.record + chipsec.helper.replay chipsec.helper.windows .. toctree:: diff --git a/_sources/modules/chipsec.library.intel.rst.txt b/_sources/modules/chipsec.library.intel.rst.txt new file mode 100644 index 00000000..785a209e --- /dev/null +++ b/_sources/modules/chipsec.library.intel.rst.txt @@ -0,0 +1,14 @@ +chipsec.library.intel package +============================= + +.. toctree:: + :maxdepth: 10 + + chipsec.library.intel.spi + chipsec.library.intel.spi_descriptor_cfgs + chipsec.library.intel.vmm_common + +.. automodule:: chipsec.library.intel + + + diff --git a/_sources/modules/chipsec.library.intel.spi.rst.txt b/_sources/modules/chipsec.library.intel.spi.rst.txt new file mode 100644 index 00000000..bcad4a79 --- /dev/null +++ b/_sources/modules/chipsec.library.intel.spi.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.intel.spi module +================================ + +.. automodule:: chipsec.library.intel.spi + + + diff --git a/_sources/modules/chipsec.library.intel.spi_descriptor_cfgs.rst.txt b/_sources/modules/chipsec.library.intel.spi_descriptor_cfgs.rst.txt new file mode 100644 index 00000000..151464a9 --- /dev/null +++ b/_sources/modules/chipsec.library.intel.spi_descriptor_cfgs.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.intel.spi\_descriptor\_cfgs module +================================================== + +.. automodule:: chipsec.library.intel.spi_descriptor_cfgs + + + diff --git a/_sources/modules/chipsec.library.intel.vmm_common.rst.txt b/_sources/modules/chipsec.library.intel.vmm_common.rst.txt new file mode 100644 index 00000000..1f72599d --- /dev/null +++ b/_sources/modules/chipsec.library.intel.vmm_common.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.intel.vmm\_common module +======================================== + +.. automodule:: chipsec.library.intel.vmm_common + + + diff --git a/_sources/modules/chipsec.library.registers.baseregister.rst.txt b/_sources/modules/chipsec.library.registers.baseregister.rst.txt new file mode 100644 index 00000000..6d7d67bd --- /dev/null +++ b/_sources/modules/chipsec.library.registers.baseregister.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.baseregister module +============================================= + +.. automodule:: chipsec.library.registers.baseregister + + + diff --git a/_sources/modules/chipsec.library.registers.io.rst.txt b/_sources/modules/chipsec.library.registers.io.rst.txt new file mode 100644 index 00000000..1dbc0a53 --- /dev/null +++ b/_sources/modules/chipsec.library.registers.io.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.io module +=================================== + +.. automodule:: chipsec.library.registers.io + + + diff --git a/_sources/modules/chipsec.library.registers.iobar.rst.txt b/_sources/modules/chipsec.library.registers.iobar.rst.txt new file mode 100644 index 00000000..a349266b --- /dev/null +++ b/_sources/modules/chipsec.library.registers.iobar.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.iobar module +====================================== + +.. automodule:: chipsec.library.registers.iobar + + + diff --git a/_sources/modules/chipsec.library.registers.memory.rst.txt b/_sources/modules/chipsec.library.registers.memory.rst.txt new file mode 100644 index 00000000..36dc7a37 --- /dev/null +++ b/_sources/modules/chipsec.library.registers.memory.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.memory module +======================================= + +.. automodule:: chipsec.library.registers.memory + + + diff --git a/_sources/modules/chipsec.library.registers.mm_msgbus.rst.txt b/_sources/modules/chipsec.library.registers.mm_msgbus.rst.txt new file mode 100644 index 00000000..71b6754d --- /dev/null +++ b/_sources/modules/chipsec.library.registers.mm_msgbus.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.mm\_msgbus module +=========================================== + +.. automodule:: chipsec.library.registers.mm_msgbus + + + diff --git a/_sources/modules/chipsec.library.registers.mmcfg.rst.txt b/_sources/modules/chipsec.library.registers.mmcfg.rst.txt new file mode 100644 index 00000000..1a3d9e47 --- /dev/null +++ b/_sources/modules/chipsec.library.registers.mmcfg.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.mmcfg module +====================================== + +.. automodule:: chipsec.library.registers.mmcfg + + + diff --git a/_sources/modules/chipsec.library.registers.mmio.rst.txt b/_sources/modules/chipsec.library.registers.mmio.rst.txt new file mode 100644 index 00000000..2c36a17f --- /dev/null +++ b/_sources/modules/chipsec.library.registers.mmio.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.mmio module +===================================== + +.. automodule:: chipsec.library.registers.mmio + + + diff --git a/_sources/modules/chipsec.library.registers.msgbus.rst.txt b/_sources/modules/chipsec.library.registers.msgbus.rst.txt new file mode 100644 index 00000000..0d1f8fba --- /dev/null +++ b/_sources/modules/chipsec.library.registers.msgbus.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.msgbus module +======================================= + +.. automodule:: chipsec.library.registers.msgbus + + + diff --git a/_sources/modules/chipsec.library.registers.msr.rst.txt b/_sources/modules/chipsec.library.registers.msr.rst.txt new file mode 100644 index 00000000..f7833b1f --- /dev/null +++ b/_sources/modules/chipsec.library.registers.msr.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.msr module +==================================== + +.. automodule:: chipsec.library.registers.msr + + + diff --git a/_sources/modules/chipsec.library.registers.pcicfg.rst.txt b/_sources/modules/chipsec.library.registers.pcicfg.rst.txt new file mode 100644 index 00000000..e6cc59f4 --- /dev/null +++ b/_sources/modules/chipsec.library.registers.pcicfg.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.registers.pcicfg module +======================================= + +.. automodule:: chipsec.library.registers.pcicfg + + + diff --git a/_sources/modules/chipsec.library.registers.rst.txt b/_sources/modules/chipsec.library.registers.rst.txt new file mode 100644 index 00000000..89bdf31f --- /dev/null +++ b/_sources/modules/chipsec.library.registers.rst.txt @@ -0,0 +1,21 @@ +chipsec.library.registers package +================================= + +.. toctree:: + :maxdepth: 10 + + chipsec.library.registers.baseregister + chipsec.library.registers.io + chipsec.library.registers.iobar + chipsec.library.registers.memory + chipsec.library.registers.mm_msgbus + chipsec.library.registers.mmcfg + chipsec.library.registers.mmio + chipsec.library.registers.msgbus + chipsec.library.registers.msr + chipsec.library.registers.pcicfg + +.. automodule:: chipsec.library.registers + + + diff --git a/_sources/modules/chipsec.library.uefi.common.rst.txt b/_sources/modules/chipsec.library.uefi.common.rst.txt new file mode 100644 index 00000000..d065d61a --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.common.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.uefi.common module +================================== + +.. automodule:: chipsec.library.uefi.common + + + diff --git a/_sources/modules/chipsec.library.uefi.compression.rst.txt b/_sources/modules/chipsec.library.uefi.compression.rst.txt new file mode 100644 index 00000000..776fbb1f --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.compression.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.uefi.compression module +======================================= + +.. automodule:: chipsec.library.uefi.compression + + + diff --git a/_sources/modules/chipsec.library.uefi.fv.rst.txt b/_sources/modules/chipsec.library.uefi.fv.rst.txt new file mode 100644 index 00000000..ba6cc890 --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.fv.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.uefi.fv module +============================== + +.. automodule:: chipsec.library.uefi.fv + + + diff --git a/_sources/modules/chipsec.library.uefi.platform.rst.txt b/_sources/modules/chipsec.library.uefi.platform.rst.txt new file mode 100644 index 00000000..613c8233 --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.platform.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.uefi.platform module +==================================== + +.. automodule:: chipsec.library.uefi.platform + + + diff --git a/_sources/modules/chipsec.library.uefi.rst.txt b/_sources/modules/chipsec.library.uefi.rst.txt new file mode 100644 index 00000000..50a721e1 --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.rst.txt @@ -0,0 +1,20 @@ +chipsec.library.uefi package +============================ + +.. toctree:: + :maxdepth: 10 + + chipsec.library.uefi.common + chipsec.library.uefi.compression + chipsec.library.uefi.fv + chipsec.library.uefi.platform + chipsec.library.uefi.search + chipsec.library.uefi.sleep_states + chipsec.library.uefi.spi + chipsec.library.uefi.variables + chipsec.library.uefi.varstore + +.. automodule:: chipsec.library.uefi + + + diff --git a/_sources/modules/chipsec.library.uefi.search.rst.txt b/_sources/modules/chipsec.library.uefi.search.rst.txt new file mode 100644 index 00000000..d1b1c452 --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.search.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.uefi.search module +================================== + +.. automodule:: chipsec.library.uefi.search + + + diff --git a/_sources/modules/chipsec.library.uefi.sleep_states.rst.txt b/_sources/modules/chipsec.library.uefi.sleep_states.rst.txt new file mode 100644 index 00000000..790e655e --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.sleep_states.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.uefi.sleep\_states module +========================================= + +.. automodule:: chipsec.library.uefi.sleep_states + + + diff --git a/_sources/modules/chipsec.library.uefi.spi.rst.txt b/_sources/modules/chipsec.library.uefi.spi.rst.txt new file mode 100644 index 00000000..7399f92a --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.spi.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.uefi.spi module +=============================== + +.. automodule:: chipsec.library.uefi.spi + + + diff --git a/_sources/modules/chipsec.library.uefi.variables.rst.txt b/_sources/modules/chipsec.library.uefi.variables.rst.txt new file mode 100644 index 00000000..b9a31288 --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.variables.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.uefi.variables module +===================================== + +.. automodule:: chipsec.library.uefi.variables + + + diff --git a/_sources/modules/chipsec.library.uefi.varstore.rst.txt b/_sources/modules/chipsec.library.uefi.varstore.rst.txt new file mode 100644 index 00000000..ba39e39a --- /dev/null +++ b/_sources/modules/chipsec.library.uefi.varstore.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.uefi.varstore module +==================================== + +.. automodule:: chipsec.library.uefi.varstore + + + diff --git a/contribution/code-style-python.html b/contribution/code-style-python.html index d20a152b..6e30f441 100644 --- a/contribution/code-style-python.html +++ b/contribution/code-style-python.html @@ -617,7 +617,7 @@

Navigation

diff --git a/contribution/sphinx.html b/contribution/sphinx.html index 05b49cb5..b6559e68 100644 --- a/contribution/sphinx.html +++ b/contribution/sphinx.html @@ -157,7 +157,7 @@

Navigation

diff --git a/development/Architecture-Overview.html b/development/Architecture-Overview.html index 4b7b38a2..1aa39cc5 100644 --- a/development/Architecture-Overview.html +++ b/development/Architecture-Overview.html @@ -163,6 +163,46 @@

HAL (Hardware Abstraction Layer) diff --git a/development/Configuration-Files.html b/development/Configuration-Files.html index 872cc853..9479af29 100644 --- a/development/Configuration-Files.html +++ b/development/Configuration-Files.html @@ -91,6 +91,7 @@

List of Cfg componentsarl
  • pch_3xxlp_orig.
  • kbl_orig.
    • +
  • pmc_i440fx
  • tglu
  • kbl
  • lnl
    • @@ -206,7 +207,7 @@

    Navigation

    diff --git a/development/Developing.html b/development/Developing.html index b38e6573..934a72f9 100644 --- a/development/Developing.html +++ b/development/Developing.html @@ -193,7 +193,7 @@

    Navigation

    diff --git a/development/OS-Helpers-and-Drivers.html b/development/OS-Helpers-and-Drivers.html index e47b6794..c9f05de6 100644 --- a/development/OS-Helpers-and-Drivers.html +++ b/development/OS-Helpers-and-Drivers.html @@ -81,6 +81,8 @@

    Helper componentschipsec.helper.efi package
  • chipsec.helper.linux package
  • chipsec.helper.linuxnative package
    • +
  • chipsec.helper.record package
    • +
  • chipsec.helper.replay package
  • chipsec.helper.windows package
  • chipsec.helper.basehelper module
  • chipsec.helper.nonehelper module
    • @@ -190,7 +192,7 @@

    Navigation

    diff --git a/development/Platform-Detection.html b/development/Platform-Detection.html index ce868e20..40e3e94b 100644 --- a/development/Platform-Detection.html +++ b/development/Platform-Detection.html @@ -164,7 +164,7 @@

    Navigation

    diff --git a/development/Sample-Module-Code.html b/development/Sample-Module-Code.html index 6343cd06..815ae6b3 100644 --- a/development/Sample-Module-Code.html +++ b/development/Sample-Module-Code.html @@ -173,7 +173,7 @@

    Navigation

    diff --git a/development/Sample-Util-Command.html b/development/Sample-Util-Command.html index 59363299..e2a90d0c 100644 --- a/development/Sample-Util-Command.html +++ b/development/Sample-Util-Command.html @@ -176,7 +176,7 @@

    Navigation

    diff --git a/development/Vulnerabilities-and-CHIPSEC-Modules.html b/development/Vulnerabilities-and-CHIPSEC-Modules.html index 1056fb16..7dd1d391 100644 --- a/development/Vulnerabilities-and-CHIPSEC-Modules.html +++ b/development/Vulnerabilities-and-CHIPSEC-Modules.html @@ -653,7 +653,7 @@

    Navigation

    diff --git a/genindex.html b/genindex.html index 0b8a21d9..b3025f3d 100644 --- a/genindex.html +++ b/genindex.html @@ -65,48 +65,454 @@

    C

    +
  • + chipsec.cfg.parsers.ip + +
    • +
  • + chipsec.cfg.parsers.ip.generic + +
    • +
  • + chipsec.cfg.parsers.ip.io + +
    • +
  • + chipsec.cfg.parsers.ip.iobar + +
    • +
  • + chipsec.cfg.parsers.ip.memory + +
    • +
  • + chipsec.cfg.parsers.ip.mm_msgbus + +
    • +
  • + chipsec.cfg.parsers.ip.mmio_bar + +
    • +
  • + chipsec.cfg.parsers.ip.msgbus + +
    • +
  • + chipsec.cfg.parsers.ip.msr + +
    • +
  • + chipsec.cfg.parsers.ip.pci_device + +
    • +
  • + chipsec.cfg.parsers.ip.platform + +
  • chipsec.cfg.parsers.locks
    • +
  • + chipsec.cfg.parsers.registers + +
    • +
  • + chipsec.cfg.parsers.registers.controls + +
    • +
  • + chipsec.cfg.parsers.registers.io + +
    • +
  • + chipsec.cfg.parsers.registers.iobar + +
    • +
  • + chipsec.cfg.parsers.registers.locks + +
    • +
  • + chipsec.cfg.parsers.registers.memory + +
    • +
  • + chipsec.cfg.parsers.registers.mm_msgbus + +
    • +
  • + chipsec.cfg.parsers.registers.mmcfg + +
    • +
  • + chipsec.cfg.parsers.registers.mmio + +
    • +
  • + chipsec.cfg.parsers.registers.msgbus + +
    • +
  • + chipsec.cfg.parsers.registers.msr + +
    • +
  • + chipsec.cfg.parsers.registers.pci + +
    • +
  • + chipsec.cfg.parsers.registers.simple + +
    • +
  • + chipsec.fuzzing + +
    • +
  • + chipsec.fuzzing.primitives + +
    • +
  • + chipsec.hal + +
    • +
  • + chipsec.hal.amd + +
    • +
  • + chipsec.hal.amd.cpu + +
    • +
  • + chipsec.hal.amd.psp + +
    • +
  • + chipsec.hal.common + +
    • +
  • + chipsec.hal.common.acpi + +
    • +
  • + chipsec.hal.common.cmos + +
    • +
  • + chipsec.hal.common.cpuid + +
    • +
  • + chipsec.hal.common.ec + +
    • +
  • + chipsec.hal.common.interrupts + +
    • +
  • + chipsec.hal.common.io + +
    • +
  • + chipsec.hal.common.iobar + +
    • +
  • + chipsec.hal.common.iommu + +
    • +
  • + chipsec.hal.common.locks + +
    • +
  • + chipsec.hal.common.memrange + +
    • +
  • + chipsec.hal.common.mmio + +
    • +
  • + chipsec.hal.common.msr + +
    • +
  • + chipsec.hal.common.pci + +
    • +
  • + chipsec.hal.common.physmem + +
    • +
  • + chipsec.hal.common.smbios + +
    • +
  • + chipsec.hal.common.smbus + +
    • +
  • + chipsec.hal.common.spd + +
    • +
  • + chipsec.hal.common.tpm + +
    • +
  • + chipsec.hal.common.uefi + +
    • +
  • + chipsec.hal.common.virtmem + +
    • +
  • + chipsec.hal.common.vmm + +
    • +
  • + chipsec.hal.hal_base + +
    • +
  • + chipsec.hal.hals + +
    • +
  • + chipsec.hal.intel + +
    • +
  • + chipsec.hal.intel.cpu + +
    • +
  • + chipsec.hal.intel.igd + +
  • - chipsec.fuzzing + chipsec.hal.intel.mm_msgbus
  • - chipsec.fuzzing.primitives + chipsec.hal.intel.mmcfg
  • - chipsec.hal + chipsec.hal.intel.msgbus
  • - chipsec.hal.hal_base + chipsec.hal.intel.spi
  • - chipsec.hal.hals + chipsec.hal.intel.spi_descriptor
    • +
  • + chipsec.hal.intel.ucode + +
  • @@ -205,6 +611,34 @@

    C

    • +
  • + chipsec.helper.record + +
    • +
  • + chipsec.helper.record.recordhelper + +
    • +
  • + chipsec.helper.replay + +
    • +
  • + chipsec.helper.replay.replayhelper + +
  • @@ -247,6 +681,34 @@

    C

    • +
  • + chipsec.library.intel + +
    • +
  • + chipsec.library.intel.spi + +
    • +
  • + chipsec.library.intel.spi_descriptor_cfgs + +
    • +
  • + chipsec.library.intel.vmm_common + +
  • @@ -268,6 +730,83 @@

    C

    • +
  • + chipsec.library.registers + +
    • +
  • + chipsec.library.registers.baseregister + +
    • +
  • + chipsec.library.registers.io + +
    • +
  • + chipsec.library.registers.iobar + +
    • +
  • + chipsec.library.registers.memory + +
    • +
  • + chipsec.library.registers.mm_msgbus + +
    • +
  • + chipsec.library.registers.mmcfg + +
    • +
  • + chipsec.library.registers.mmio + +
    • +
  • + chipsec.library.registers.msgbus + +
    • +
  • + chipsec.library.registers.msr + +
    • +
  • + chipsec.library.registers.pcicfg + +
  • @@ -289,6 +828,78 @@

    C

    • +
  • + chipsec.library.uefi + +
    • +
  • + chipsec.library.uefi.common + +
    • +
  • + chipsec.library.uefi.compression + +
    • + + - - diff --git a/index.html b/index.html index 4d8c7dd7..5c088673 100644 --- a/index.html +++ b/index.html @@ -5,7 +5,7 @@ - CHIPSEC 2.0.3 — CHIPSEC documentation + CHIPSEC 2.0.5 — CHIPSEC documentation @@ -31,7 +31,7 @@

    Navigation

    next |
  • CHIPSEC documentation »
    • -
  • CHIPSEC 2.0.3
    • +
  • CHIPSEC 2.0.5
    • @@ -40,8 +40,8 @@

    Navigation

    -
    -

    CHIPSEC 2.0.3¶

    +
    +

    CHIPSEC 2.0.5¶

    CHIPSEC is a framework for analyzing platform level security of hardware, devices, system firmware, low-level protection mechanisms, and the configuration of various platform components.

    @@ -229,11 +229,11 @@

    Navigation

    next |
  • CHIPSEC documentation »
    • -
  • CHIPSEC 2.0.3
    • +
  • CHIPSEC 2.0.5
    • diff --git a/installation/InstallLinux.html b/installation/InstallLinux.html index 28bc9d2e..667532ac 100644 --- a/installation/InstallLinux.html +++ b/installation/InstallLinux.html @@ -226,7 +226,7 @@

    Navigation

    diff --git a/installation/InstallWinDAL.html b/installation/InstallWinDAL.html index fb32f072..90a8dd95 100644 --- a/installation/InstallWinDAL.html +++ b/installation/InstallWinDAL.html @@ -164,7 +164,7 @@

    Navigation

    diff --git a/installation/InstallWindows.html b/installation/InstallWindows.html index 95f13d6b..ff8d47cb 100644 --- a/installation/InstallWindows.html +++ b/installation/InstallWindows.html @@ -424,7 +424,7 @@

    Navigation

    diff --git a/installation/USBwithUEFIShell.html b/installation/USBwithUEFIShell.html index c84fb497..ab09116b 100644 --- a/installation/USBwithUEFIShell.html +++ b/installation/USBwithUEFIShell.html @@ -252,7 +252,7 @@

    Navigation

    diff --git a/modules/chipsec.cfg.8086.adl.xml.html b/modules/chipsec.cfg.8086.adl.xml.html index 7c4700a4..45613efc 100644 --- a/modules/chipsec.cfg.8086.adl.xml.html +++ b/modules/chipsec.cfg.8086.adl.xml.html @@ -165,7 +165,7 @@

    Navigation

    diff --git a/modules/chipsec.cfg.8086.arl.xml.html b/modules/chipsec.cfg.8086.arl.xml.html index 6ed664fa..65d44f9d 100644 --- a/modules/chipsec.cfg.8086.arl.xml.html +++ b/modules/chipsec.cfg.8086.arl.xml.html @@ -165,7 +165,7 @@

    Navigation

    diff --git a/modules/chipsec.cfg.8086.arlh.xml.html b/modules/chipsec.cfg.8086.arlh.xml.html index 8dcd4ac9..7e867438 100644 --- a/modules/chipsec.cfg.8086.arlh.xml.html +++ b/modules/chipsec.cfg.8086.arlh.xml.html @@ -165,7 +165,7 @@

    Navigation

    diff --git a/modules/chipsec.cfg.8086.html b/modules/chipsec.cfg.8086.html index b994d178..cc90b24a 100644 --- a/modules/chipsec.cfg.8086.html +++ b/modules/chipsec.cfg.8086.html @@ -50,6 +50,7 @@

    Navigation

  • arl
  • pch_3xxlp_orig.
  • kbl_orig.
    • +
  • pmc_i440fx
  • tglu
  • kbl
  • lnl
    • @@ -164,7 +165,7 @@

    Navigation

    diff --git a/modules/chipsec.cfg.8086.kbl.xml.html b/modules/chipsec.cfg.8086.kbl.xml.html index 60557135..ae892707 100644 --- a/modules/chipsec.cfg.8086.kbl.xml.html +++ b/modules/chipsec.cfg.8086.kbl.xml.html @@ -154,7 +154,7 @@

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    diff --git a/modules/chipsec.cfg.8086.kbl_orig.xmls.html b/modules/chipsec.cfg.8086.kbl_orig.xmls.html index 742fea37..c94a9b5a 100644 --- a/modules/chipsec.cfg.8086.kbl_orig.xmls.html +++ b/modules/chipsec.cfg.8086.kbl_orig.xmls.html @@ -16,7 +16,7 @@ - +

    Next topic

    -

    tglu

    +

    pmc_i440fx