diff --git a/mlir/include/mlir/Dialect/DXSA/IR/DXSAResourceOps.td b/mlir/include/mlir/Dialect/DXSA/IR/DXSAResourceOps.td
index e73ef4c04357..502d72d3be5c 100644
--- a/mlir/include/mlir/Dialect/DXSA/IR/DXSAResourceOps.td
+++ b/mlir/include/mlir/Dialect/DXSA/IR/DXSAResourceOps.td
@@ -476,7 +476,7 @@ def DXSA_SampleCLZ : DXSA_Op<"sample_c_lz"> {
 }
 
 def DXSA_SampleCLZFeedback : DXSA_Op<"sample_c_lz_s"> {
-  let summary = "same as `dxsa.sample_c_lz`, but with an additional LOD clamp and status output";
+  let summary = "same as `dxsa.sample_c_lz`, but with an additional status output";
   let description = [{
     `dst`, `src_address`, `src_resource`, `src_sampler`,
     `src_reference_value`, `offset` operands are the same as in
@@ -504,4 +504,321 @@ def DXSA_SampleCLZFeedback : DXSA_Op<"sample_c_lz_s"> {
   }];
 }
 
+//===----------------------------------------------------------------------===//
+// dxsa.gather4
+//===----------------------------------------------------------------------===//
+
+def DXSA_Gather4 : DXSA_Op<"gather4"> {
+  let summary = "gathers four texels and packs them into a single register";
+  let description = [{
+    The `dxsa.gather4` operation gathers the four texels that would be used in a
+    bi-linear filtering operation and packs them into a single register. Only
+    works with 2D or CubeMap textures (incl arrays). Only the addressing modes
+    of the sampler are used and the top level of any mip pyramid is used.
+
+    `dxsa.gather4` behaves like the `dxsa.sample` instruction, but a filtered
+    sample is not generated.  The four samples that would contribute to
+    filtering are placed into xyzw in counter clockwise order starting with the
+    sample to the lower left of the queried location.  This is the same as point
+    sampling with (u,v) texture coordinate deltas at the following locations:
+    (-,+),(+,+),(+,-),(-,-), where the magnitude of the deltas are always half a
+    texel.
+
+    `src_address` provides the set of texture coordinates needed to perform the
+    sample, as floating point values referencing normalized space in the
+    texture.
+
+    `src_resource` is a texture register (t). This is simply a placeholder for a
+    texture, including the return data type of the resource being sampled.
+
+    `src_sampler` is a sampler register (s).  This is simply a placeholder for a
+    collection of filtering controls (such as point vs. linear, mipmapping and
+    address wrapping controls).
+
+    The optional `offset` operand suffix (address offset by immediate integer)
+    indicates that the texture coordinates for the sample are to be offset by a
+    set of provided immediate texel space integer constant values. The literal
+    values are a set of 4 bit 2's complement numbers, having integer range
+    [-8,7].
+
+    Example:
+
+    ```mlir
+    dxsa.gather4 r<0>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>
+    dxsa.gather4 r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <y>>, <u = -5, v = 7, w = 0>
+    ```
+  }];
+
+  let arguments = (ins
+      DXSA_DstOperandAttr:$dst,
+      DXSA_SrcOperandAttr:$src_address,
+      DXSA_SrcOperandAttr:$src_resource,
+      DXSA_SrcOperandAttr:$src_sampler,
+      OptionalAttr<DXSA_SampleOffsetAttr>:$offset);
+  let results = (outs);
+
+  let assemblyFormat = [{
+    $dst `,` $src_address `,` $src_resource `,` $src_sampler
+    (`,` $offset^)?
+    attr-dict
+  }];
+}
+
+def DXSA_Gather4Feedback : DXSA_Op<"gather4_s"> {
+  let summary = "same as `dxsa.gather4`, but with an additional status output";
+  let description = [{
+    `dst`, `src_address`, `src_resource`, `src_sampler`, `offset`
+    operands are the same as in `dxsa.gather4` instruction.
+
+    The `feedback` operand appends an additional 32 bit scalar Tiled
+    Resources shader feedback status output value. Can be NULL (or not
+    present) if not used.  See Tiled Resources Texture Sampling
+    Features(5.9.4.5) for details.
+
+    Example:
+
+    ```mlir
+    dxsa.gather4_s r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, r<2, <x>>, <u = -3, v = 2, w = 0>
+    ```
+  }];
+
+  let arguments = (ins
+      DXSA_DstOperandAttr:$dst,
+      DXSA_SrcOperandAttr:$src_address,
+      DXSA_SrcOperandAttr:$src_resource,
+      DXSA_SrcOperandAttr:$src_sampler,
+      DXSA_DstOperandAttr:$feedback,
+      OptionalAttr<DXSA_SampleOffsetAttr>:$offset);
+  let results = (outs);
+
+  let assemblyFormat = [{
+    $dst `,` $src_address `,` $src_resource `,` $src_sampler `,` $feedback
+    (`,` $offset^)?
+    attr-dict
+  }];
+}
+
+//===----------------------------------------------------------------------===//
+// dxsa.gather4_c
+//===----------------------------------------------------------------------===//
+
+def DXSA_Gather4C : DXSA_Op<"gather4_c"> {
+  let summary = "same as `dxsa.gather4`, except performs comparison on texels, similar to `dxsa.sample_c`";
+  let description = [{
+    The operands to `dxsa.gather4_c` are identical to `dxsa.gather4`, except
+    that there is an additional float32 source operand, `src_reference_value`,
+    which must be a register with single-component selected, or a scalar
+    literal.
+
+    See existing `dxsa.sample_c` for how `src_reference_value` gets compared
+    against each fetched texel.  Unlike `dxsa.sample_c`, `dxsa.gather4_c` simply
+    returns each comparison result, rather than filtering them.
+
+    Example:
+
+    ```mlir
+    dxsa.gather4_c r<0>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>, v<0, <y>>
+    dxsa.gather4_c r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <y>>, v<0, <y>>, <u = -5, v = 7, w = 0>
+     ```
+  }];
+
+  let arguments = (ins
+      DXSA_DstOperandAttr:$dst,
+      DXSA_SrcOperandAttr:$src_address,
+      DXSA_SrcOperandAttr:$src_resource,
+      DXSA_SrcOperandAttr:$src_sampler,
+      DXSA_SrcOperandAttr:$src_reference_value,
+      OptionalAttr<DXSA_SampleOffsetAttr>:$offset);
+  let results = (outs);
+
+  let assemblyFormat = [{
+    $dst `,` $src_address `,` $src_resource `,` $src_sampler `,` $src_reference_value
+    (`,` $offset^)?
+    attr-dict
+  }];
+}
+
+def DXSA_Gather4CFeedback : DXSA_Op<"gather4_c_s"> {
+  let summary = "same as `dxsa.`, but with an additional status output";
+  let description = [{
+    `dst`, `src_address`, `src_resource`, `src_sampler`,
+    `src_reference_value`, `offset` operands are the same as in
+    `dxsa.gather4_c` instruction.
+
+    The `feedback` operand appends an additional 32 bit scalar Tiled
+    Resources shader feedback status output value. Can be NULL (or not
+    present) if not used.  See Tiled Resources Texture Sampling
+    Features(5.9.4.5) for details.
+
+    Example:
+
+    ```mlir
+    dxsa.gather4_c_s r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, v<0, <y>>, r<2, <x>>, <u = -3, v = 2, w = 0>
+    ```
+  }];
+
+  let arguments = (ins
+      DXSA_DstOperandAttr:$dst,
+      DXSA_SrcOperandAttr:$src_address,
+      DXSA_SrcOperandAttr:$src_resource,
+      DXSA_SrcOperandAttr:$src_sampler,
+      DXSA_SrcOperandAttr:$src_reference_value,
+      DXSA_DstOperandAttr:$feedback,
+      OptionalAttr<DXSA_SampleOffsetAttr>:$offset);
+  let results = (outs);
+
+  let assemblyFormat = [{
+    $dst `,` $src_address `,` $src_resource `,` $src_sampler `,` $src_reference_value `,` $feedback
+    (`,` $offset^)?
+    attr-dict
+  }];
+}
+
+//===----------------------------------------------------------------------===//
+// dxsa.gather4_po
+//===----------------------------------------------------------------------===//
+
+def DXSA_Gather4PO : DXSA_Op<"gather4_po"> {
+  let summary = "variant of `dxsa.gather4`, where the offset comes as a parameter to the instruction";
+  let description = [{
+    Variant of `dxsa.gather4`, where instead of supporting an immediate offset
+    [-8..7], the offset comes as a `src_offset` parameter to the instruction,
+    and also has larger range of [-32..31].
+
+    The first 2 components of the 4-vector offset parameter supply 32-bit
+    integer offsets.  The other components of this parameter are ignored.
+
+    The 6 least significant bits of each offset value is honored as a signed
+    value, yielding [-32..31] range.
+
+    `dxsa.gather4_po` only works with 2D textures (unlike gather4, which also
+    works with TextureCubes).
+
+    Example:
+
+    ```mlir
+    dxsa.gather4_po r<1, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>
+    ```
+  }];
+
+  let arguments = (ins
+      DXSA_DstOperandAttr:$dst,
+      DXSA_SrcOperandAttr:$src_address,
+      DXSA_SrcOperandAttr:$src_offset,
+      DXSA_SrcOperandAttr:$src_resource,
+      DXSA_SrcOperandAttr:$src_sampler);
+  let results = (outs);
+
+  let assemblyFormat = [{
+    $dst `,` $src_address `,` $src_offset `,` $src_resource `,` $src_sampler
+    attr-dict
+  }];
+}
+
+def DXSA_Gather4POFeedback : DXSA_Op<"gather4_po_s"> {
+  let summary = "same as `dxsa.gather4_po`, but with an additional status output";
+  let description = [{
+    `dst`, `src_address`, `src_offset`, `src_resource`, `src_sampler`
+    operands are the same as in `dxsa.gather4_po` instruction.
+
+    The `feedback` operand appends an additional 32 bit scalar Tiled
+    Resources shader feedback status output value. Can be NULL (or not
+    present) if not used.  See Tiled Resources Texture Sampling
+    Features(5.9.4.5) for details.
+
+    Example:
+
+    ```mlir
+    dxsa.gather4_po_s r<3, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, r<4, <x>>
+    ```
+  }];
+
+  let arguments = (ins
+      DXSA_DstOperandAttr:$dst,
+      DXSA_SrcOperandAttr:$src_address,
+      DXSA_SrcOperandAttr:$src_offset,
+      DXSA_SrcOperandAttr:$src_resource,
+      DXSA_SrcOperandAttr:$src_sampler,
+      DXSA_DstOperandAttr:$feedback);
+  let results = (outs);
+
+  let assemblyFormat = [{
+    $dst `,` $src_address `,` $src_offset `,` $src_resource `,` $src_sampler `,` $feedback
+    attr-dict
+  }];
+}
+
+//===----------------------------------------------------------------------===//
+// dxsa.gather4_po_c
+//===----------------------------------------------------------------------===//
+
+def DXSA_Gather4POC : DXSA_Op<"gather4_po_c"> {
+  let summary = "same as `dxsa.gather4_po`, except performs comparison on texels, similar to `dxsa.sample_c`";
+  let description = [{
+    The operands to `dxsa.gather4_po_c` are identical to `dxsa.gather4_po`,
+    except that there is an additional float32 source operand,
+    `src_reference_value`, which must be a register with single-component
+    selected, or a scalar literal.
+
+    See existing `dxsa.sample_c` for how `src_reference_value` gets compared
+    against each fetched texel.  Unlike `dxsa.sample_c`, `dxsa.gather4_po_c`
+    simply returns each comparison result, rather than filtering them.
+
+    Example:
+
+    ```mlir
+    dxsa.gather4_po_c r<1, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>, v<0, <y>>
+    ```
+  }];
+
+  let arguments = (ins
+      DXSA_DstOperandAttr:$dst,
+      DXSA_SrcOperandAttr:$src_address,
+      DXSA_SrcOperandAttr:$src_offset,
+      DXSA_SrcOperandAttr:$src_resource,
+      DXSA_SrcOperandAttr:$src_sampler,
+      DXSA_SrcOperandAttr:$src_reference_value);
+  let results = (outs);
+
+  let assemblyFormat = [{
+    $dst `,` $src_address `,` $src_offset `,` $src_resource `,` $src_sampler `,` $src_reference_value
+    attr-dict
+  }];
+}
+
+def DXSA_Gather4POCFeedback : DXSA_Op<"gather4_po_c_s"> {
+  let summary = "same as `dxsa.gather4_po_c`, but with an additional status output";
+  let description = [{
+    `dst`, `src_address`, `src_offset`, `src_resource`, `src_sampler`,
+    `src_reference_value` operands are the same as in
+    `dxsa.gather4_po_c` instruction.
+
+    The `feedback` operand appends an additional 32 bit scalar Tiled
+    Resources shader feedback status output value. Can be NULL (or not present)
+    if not used.  See Tiled Resources Texture Sampling Features(5.9.4.5) for
+    details.
+
+    Example:
+
+    ```mlir
+    dxsa.gather4_po_c_s r<3, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, v<0, <y>>, r<4, <x>>
+    ```
+  }];
+
+  let arguments = (ins
+      DXSA_DstOperandAttr:$dst,
+      DXSA_SrcOperandAttr:$src_address,
+      DXSA_SrcOperandAttr:$src_offset,
+      DXSA_SrcOperandAttr:$src_resource,
+      DXSA_SrcOperandAttr:$src_sampler,
+      DXSA_SrcOperandAttr:$src_reference_value,
+      DXSA_DstOperandAttr:$feedback);
+  let results = (outs);
+
+  let assemblyFormat = [{
+    $dst `,` $src_address `,` $src_offset `,` $src_resource `,` $src_sampler `,` $src_reference_value `,` $feedback
+    attr-dict
+  }];
+}
+
 #endif // MLIR_DIALECT_DXSA_IR_DXSARESOURCEOPS
diff --git a/mlir/lib/Target/DXSA/BinaryParser.cpp b/mlir/lib/Target/DXSA/BinaryParser.cpp
index b641df41ccab..74c790453192 100644
--- a/mlir/lib/Target/DXSA/BinaryParser.cpp
+++ b/mlir/lib/Target/DXSA/BinaryParser.cpp
@@ -1168,6 +1168,89 @@ class DXBuilder {
         srcReferenceValue, clampFeedback, offset);
   }
 
+  Instruction buildGather4(dxsa::DstOperandAttr dst,
+                           dxsa::SrcOperandAttr srcAddress,
+                           dxsa::SrcOperandAttr srcResource,
+                           dxsa::SrcOperandAttr srcSampler,
+                           dxsa::SampleOffsetAttr offset, Location loc) {
+    return dxsa::Gather4::create(builder, loc, dst, srcAddress, srcResource,
+                                 srcSampler, offset);
+  }
+
+  Instruction buildGather4Feedback(dxsa::DstOperandAttr dst,
+                                   dxsa::SrcOperandAttr srcAddress,
+                                   dxsa::SrcOperandAttr srcResource,
+                                   dxsa::SrcOperandAttr srcSampler,
+                                   dxsa::DstOperandAttr feedback,
+                                   dxsa::SampleOffsetAttr offset,
+                                   Location loc) {
+    return dxsa::Gather4Feedback::create(builder, loc, dst, srcAddress,
+                                         srcResource, srcSampler, feedback,
+                                         offset);
+  }
+
+  Instruction buildGather4C(dxsa::DstOperandAttr dst,
+                            dxsa::SrcOperandAttr srcAddress,
+                            dxsa::SrcOperandAttr srcResource,
+                            dxsa::SrcOperandAttr srcSampler,
+                            dxsa::SrcOperandAttr srcReferenceValue,
+                            dxsa::SampleOffsetAttr offset, Location loc) {
+    return dxsa::Gather4C::create(builder, loc, dst, srcAddress, srcResource,
+                                  srcSampler, srcReferenceValue, offset);
+  }
+
+  Instruction buildGather4CFeedback(
+      dxsa::DstOperandAttr dst, dxsa::SrcOperandAttr srcAddress,
+      dxsa::SrcOperandAttr srcResource, dxsa::SrcOperandAttr srcSampler,
+      dxsa::SrcOperandAttr srcReferenceValue, dxsa::DstOperandAttr feedback,
+      dxsa::SampleOffsetAttr offset, Location loc) {
+    return dxsa::Gather4CFeedback::create(builder, loc, dst, srcAddress,
+                                          srcResource, srcSampler,
+                                          srcReferenceValue, feedback, offset);
+  }
+
+  Instruction buildGather4PO(dxsa::DstOperandAttr dst,
+                             dxsa::SrcOperandAttr srcAddress,
+                             dxsa::SrcOperandAttr srcOffset,
+                             dxsa::SrcOperandAttr srcResource,
+                             dxsa::SrcOperandAttr srcSampler, Location loc) {
+    return dxsa::Gather4PO::create(builder, loc, dst, srcAddress, srcOffset,
+                                   srcResource, srcSampler);
+  }
+
+  Instruction buildGather4POFeedback(dxsa::DstOperandAttr dst,
+                                     dxsa::SrcOperandAttr srcAddress,
+                                     dxsa::SrcOperandAttr srcOffset,
+                                     dxsa::SrcOperandAttr srcResource,
+                                     dxsa::SrcOperandAttr srcSampler,
+                                     dxsa::DstOperandAttr feedback,
+                                     Location loc) {
+    return dxsa::Gather4POFeedback::create(builder, loc, dst, srcAddress,
+                                           srcOffset, srcResource, srcSampler,
+                                           feedback);
+  }
+
+  Instruction buildGather4POC(dxsa::DstOperandAttr dst,
+                              dxsa::SrcOperandAttr srcAddress,
+                              dxsa::SrcOperandAttr srcOffset,
+                              dxsa::SrcOperandAttr srcResource,
+                              dxsa::SrcOperandAttr srcSampler,
+                              dxsa::SrcOperandAttr srcReferenceValue,
+                              Location loc) {
+    return dxsa::Gather4POC::create(builder, loc, dst, srcAddress, srcOffset,
+                                    srcResource, srcSampler, srcReferenceValue);
+  }
+
+  Instruction buildGather4POCFeedback(
+      dxsa::DstOperandAttr dst, dxsa::SrcOperandAttr srcAddress,
+      dxsa::SrcOperandAttr srcOffset, dxsa::SrcOperandAttr srcResource,
+      dxsa::SrcOperandAttr srcSampler, dxsa::SrcOperandAttr srcReferenceValue,
+      dxsa::DstOperandAttr feedback, Location loc) {
+    return dxsa::Gather4POCFeedback::create(builder, loc, dst, srcAddress,
+                                            srcOffset, srcResource, srcSampler,
+                                            srcReferenceValue, feedback);
+  }
+
 private:
   MLIRContext *context;
   OpBuilder builder;
@@ -2116,6 +2199,118 @@ class Parser {
     return instr;
   }
 
+  FailureOr<Instruction>
+  parseGather4Instructions(uint32_t opcode, ExtendedInstruction &ext,
+                           size_t beginOffset, uint32_t length, Location loc) {
+    dxsa::SampleOffsetAttr offset;
+    if (ext.sampleOffset) {
+      offset = builder.buildSampleOffsetAttr(*ext.sampleOffset);
+    }
+
+    auto dst = parseDstOperand();
+    FAILURE_IF_FAILED(dst);
+
+    dxsa::DstOperandAttr feedback;
+    switch (opcode) {
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_FEEDBACK:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_C_FEEDBACK:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_PO_FEEDBACK:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_PO_C_FEEDBACK:
+      // For Feedback variant, feedback operand is the second dst
+      // register.
+      auto op = parseDstOperand();
+      FAILURE_IF_FAILED(op);
+      feedback = *op;
+      break;
+    }
+
+    auto srcAddress = parseSrcOperand();
+    FAILURE_IF_FAILED(srcAddress);
+
+    dxsa::SrcOperandAttr srcOffset;
+    switch (opcode) {
+    case D3D11_SB_OPCODE_GATHER4_PO:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_PO_FEEDBACK:
+    case D3D11_SB_OPCODE_GATHER4_PO_C:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_PO_C_FEEDBACK: {
+      auto offset = parseSrcOperand();
+      FAILURE_IF_FAILED(offset);
+      srcOffset = *offset;
+    }
+    }
+
+    auto srcResource = parseSrcOperand();
+    FAILURE_IF_FAILED(srcResource);
+
+    auto srcSampler = parseSrcOperand();
+    FAILURE_IF_FAILED(srcSampler);
+
+    FailureOr<Instruction> instr;
+    switch (opcode) {
+    case D3D10_1_SB_OPCODE_GATHER4:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_FEEDBACK: {
+      if (feedback) {
+        instr =
+            builder.buildGather4Feedback(*dst, *srcAddress, *srcResource,
+                                         *srcSampler, feedback, offset, loc);
+      } else {
+        instr = builder.buildGather4(*dst, *srcAddress, *srcResource,
+                                     *srcSampler, offset, loc);
+      }
+      break;
+    }
+    case D3D11_SB_OPCODE_GATHER4_C:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_C_FEEDBACK: {
+      auto srcReferenceValue = parseSrcOperand();
+      FAILURE_IF_FAILED(srcReferenceValue);
+      if (feedback) {
+        instr = builder.buildGather4CFeedback(*dst, *srcAddress, *srcResource,
+                                              *srcSampler, *srcReferenceValue,
+                                              feedback, offset, loc);
+      } else {
+        instr =
+            builder.buildGather4C(*dst, *srcAddress, *srcResource, *srcSampler,
+                                  *srcReferenceValue, offset, loc);
+      }
+      break;
+    }
+    case D3D11_SB_OPCODE_GATHER4_PO:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_PO_FEEDBACK: {
+      if (feedback) {
+        instr = builder.buildGather4POFeedback(*dst, *srcAddress, srcOffset,
+                                               *srcResource, *srcSampler,
+                                               feedback, loc);
+      } else {
+        instr = builder.buildGather4PO(*dst, *srcAddress, srcOffset,
+                                       *srcResource, *srcSampler, loc);
+      }
+      break;
+    }
+    case D3D11_SB_OPCODE_GATHER4_PO_C:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_PO_C_FEEDBACK: {
+      auto srcReferenceValue = parseSrcOperand();
+      FAILURE_IF_FAILED(srcReferenceValue);
+      if (feedback) {
+        instr = builder.buildGather4POCFeedback(
+            *dst, *srcAddress, srcOffset, *srcResource, *srcSampler,
+            *srcReferenceValue, feedback, loc);
+
+      } else {
+        instr =
+            builder.buildGather4POC(*dst, *srcAddress, srcOffset, *srcResource,
+                                    *srcSampler, *srcReferenceValue, loc);
+      }
+      break;
+    }
+    default:
+      llvm_unreachable("unhandled instruction");
+    }
+
+    FAILURE_IF_FAILED(instr);
+    FAILURE_IF_FAILED(verifyInstructionLength(beginOffset, length));
+    return instr;
+  }
+
   FailureOr<Instruction> parseDclInput(Location loc) {
     auto operand = parseDstOperand();
     FAILURE_IF_FAILED(operand);
@@ -3090,6 +3285,16 @@ class Parser {
     case D3DWDDM1_3_SB_OPCODE_SAMPLE_L_FEEDBACK:
       return parseSampleInstruction(opcode, extendedInst, beginOffset,
                                     instructionLengthInTokens, getLocation());
+    case D3D10_1_SB_OPCODE_GATHER4:
+    case D3D11_SB_OPCODE_GATHER4_C:
+    case D3D11_SB_OPCODE_GATHER4_PO:
+    case D3D11_SB_OPCODE_GATHER4_PO_C:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_C_FEEDBACK:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_FEEDBACK:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_PO_C_FEEDBACK:
+    case D3DWDDM1_3_SB_OPCODE_GATHER4_PO_FEEDBACK:
+      return parseGather4Instructions(opcode, extendedInst, beginOffset,
+                                      instructionLengthInTokens, getLocation());
     }
 #undef SATURABLE_OP
 #undef PLAIN_OP
diff --git a/mlir/test/Target/DXSA/gather4.test b/mlir/test/Target/DXSA/gather4.test
new file mode 100644
index 000000000000..35fbbf24a918
--- /dev/null
+++ b/mlir/test/Target/DXSA/gather4.test
@@ -0,0 +1,21 @@
+// RUN: mlir-translate --import-dxsa-hex %s | FileCheck %s
+// RUN: mlir-translate --import-dxsa-hex %s | mlir-opt --verify-roundtrip
+
+// CHECK: dxsa.gather4 r<0>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>
+
+0x8b00006d, 0x800000c2, 0x00155543, 0x001000f2,
+0x00000000, 0x00101046, 0x00000000, 0x00107e46,
+0x00000000, 0x0010600a, 0x00000000
+
+// CHECK: dxsa.gather4 r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <y>>, <u = -5, v = 7, w = 0>
+
+0x8c00006d, 0x8000f601, 0x800000c2, 0x00155543,
+0x001000f2, 0x00000001, 0x00101046, 0x00000000,
+0x00107e46, 0x00000000, 0x0010601a, 0x00000000
+
+// CHECK: dxsa.gather4_s r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, r<2, <x>>, <u = -3, v = 2, w = 0>
+
+0x8e0000db, 0x80005a01, 0x800000c2, 0x00155543,
+0x001000f2, 0x00000001, 0x00100012, 0x00000002,
+0x00101046, 0x00000000, 0x00107e46, 0x00000000,
+0x0010603a, 0x00000000
diff --git a/mlir/test/Target/DXSA/gather4_c.test b/mlir/test/Target/DXSA/gather4_c.test
new file mode 100644
index 000000000000..82a6de5ebb9c
--- /dev/null
+++ b/mlir/test/Target/DXSA/gather4_c.test
@@ -0,0 +1,23 @@
+// RUN: mlir-translate --import-dxsa-hex %s | FileCheck %s
+// RUN: mlir-translate --import-dxsa-hex %s | mlir-opt --verify-roundtrip
+
+// CHECK: dxsa.gather4_c r<0>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>, v<0, <y>>
+
+0x8d00007e, 0x800000c2, 0x00155543, 0x001000f2,
+0x00000000, 0x00101046, 0x00000000, 0x00107e46,
+0x00000000, 0x0010600a, 0x00000000, 0x0010101a,
+0x00000000
+
+// CHECK: dxsa.gather4_c r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <y>>, v<0, <y>>, <u = -5, v = 7, w = 0>
+
+0x8e00007e, 0x8000f601, 0x800000c2, 0x00155543,
+0x001000f2, 0x00000001, 0x00101046, 0x00000000,
+0x00107e46, 0x00000000, 0x0010601a, 0x00000000,
+0x0010101a, 0x00000000
+
+// CHECK: dxsa.gather4_c_s r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, v<0, <y>>, r<2, <x>>, <u = -3, v = 2, w = 0>
+
+0x900000dc, 0x80005a01, 0x800000c2, 0x00155543,
+0x001000f2, 0x00000001, 0x00100012, 0x00000002,
+0x00101046, 0x00000000, 0x00107e46, 0x00000000,
+0x0010603a, 0x00000000, 0x0010101a, 0x00000000
diff --git a/mlir/test/Target/DXSA/gather4_po.test b/mlir/test/Target/DXSA/gather4_po.test
new file mode 100644
index 000000000000..c36feac844c3
--- /dev/null
+++ b/mlir/test/Target/DXSA/gather4_po.test
@@ -0,0 +1,16 @@
+// RUN: mlir-translate --import-dxsa-hex %s | FileCheck %s
+// RUN: mlir-translate --import-dxsa-hex %s | mlir-opt --verify-roundtrip
+
+// CHECK: dxsa.gather4_po r<1, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>
+
+0x8d00007f, 0x800000c2, 0x00155543, 0x00100012,
+0x00000001, 0x00101046, 0x00000000, 0x00100046,
+0x00000000, 0x00107e46, 0x00000000, 0x0010600a,
+0x00000000
+
+// CHECK: dxsa.gather4_po_s r<3, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, r<4, <x>>
+
+0x8f0000dd, 0x800000c2, 0x00155543, 0x00100012,
+0x00000003, 0x00100012, 0x00000004, 0x00101046,
+0x00000000, 0x00100046, 0x00000000, 0x00107e46,
+0x00000000, 0x0010603a, 0x00000000
diff --git a/mlir/test/Target/DXSA/gather4_po_c.test b/mlir/test/Target/DXSA/gather4_po_c.test
new file mode 100644
index 000000000000..b69ae8a7747d
--- /dev/null
+++ b/mlir/test/Target/DXSA/gather4_po_c.test
@@ -0,0 +1,17 @@
+// RUN: mlir-translate --import-dxsa-hex %s | FileCheck %s
+// RUN: mlir-translate --import-dxsa-hex %s | mlir-opt --verify-roundtrip
+
+// CHECK: dxsa.gather4_po_c r<1, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>, v<0, <y>>
+
+0x8f000080, 0x800000c2, 0x00155543, 0x00100012,
+0x00000001, 0x00101046, 0x00000000, 0x00100046,
+0x00000000, 0x00107e46, 0x00000000, 0x0010600a,
+0x00000000, 0x0010101a, 0x00000000
+
+// CHECK: dxsa.gather4_po_c_s r<3, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, v<0, <y>>, r<4, <x>>
+
+0x910000de, 0x800000c2, 0x00155543, 0x00100012,
+0x00000003, 0x00100012, 0x00000004, 0x00101046,
+0x00000000, 0x00100046, 0x00000000, 0x00107e46,
+0x00000000, 0x0010603a, 0x00000000, 0x0010101a,
+0x00000000
diff --git a/mlir/test/Target/DXSA/hlsl/bufinfo.test b/mlir/test/Target/DXSA/hlsl/bufinfo.test
index 440fe0276e04..2d7076f44009 100644
--- a/mlir/test/Target/DXSA/hlsl/bufinfo.test
+++ b/mlir/test/Target/DXSA/hlsl/bufinfo.test
@@ -11,18 +11,42 @@
 // CHECK:         dxsa.dcl_uav_typed <id = 3, dim =  buffer>, <x =  sint, y =  sint, z =  sint, w =  sint>
 // CHECK:         dxsa.dcl_output o<0, <x>>
 // CHECK:         dxsa.dcl_temps 1
-// CHECK:         dxsa.unknown <tokens = [0x87000079, 0x8001A302, 0x00199983, 0x00100012, 0x00000000, 0x00107E46, 0x00000000]>
+// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "bufinfo" %[[OPERAND_0]], %[[OPERAND_1]]
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, l(0x34)
-// CHECK:         dxsa.unknown <tokens = [0x87000079, 0x8001A302, 0x00199983, 0x00100022, 0x00000000, 0x0011EE16, 0x00000001]>
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, swizzle = dense<[1, 0, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "bufinfo" %[[OPERAND_2]], %[[OPERAND_3]]
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, r<0, <y>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, l(0x34)
-// CHECK:         dxsa.unknown <tokens = [0x87000079, 0x800002C2, 0x00199983, 0x00100022, 0x00000000, 0x00107E16, 0x00000001]>
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<[1, 0, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "bufinfo" %[[OPERAND_4]], %[[OPERAND_5]]
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <y>>, r<0, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x87000079, 0x800002C2, 0x00199983, 0x00100022, 0x00000000, 0x0011EE16, 0x00000002]>
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_6]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, swizzle = dense<[1, 0, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "bufinfo" %[[OPERAND_6]], %[[OPERAND_7]]
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <y>>, r<0, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x87000079, 0x80000042, 0x00044443, 0x00100022, 0x00000000, 0x00107E16, 0x00000002]>
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_8]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_9]] {num_components = 4 : i32, swizzle = dense<[1, 0, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "bufinfo" %[[OPERAND_8]], %[[OPERAND_9]]
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <y>>, r<0, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x87000079, 0x80000042, 0x000CCCC3, 0x00100022, 0x00000000, 0x0011EE16, 0x00000003]>
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_10]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, swizzle = dense<[1, 0, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "bufinfo" %[[OPERAND_10]], %[[OPERAND_11]]
 // CHECK:         dxsa.iadd o<0, <x>>, r<0, <y>>, r<0, <x>>
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/cs1.test b/mlir/test/Target/DXSA/hlsl/cs1.test
index 5e4c5fab5332..8a796da585b2 100644
--- a/mlir/test/Target/DXSA/hlsl/cs1.test
+++ b/mlir/test/Target/DXSA/hlsl/cs1.test
@@ -15,16 +15,22 @@
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <y>>, r<0, <x>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, vThreadIDInGroup<<z>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, vThreadIDInGroupFlattened<vector, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x00100022, 0x00000000, 0x0010000A, 0x00000000, 0x0011E006, 0x00000000]>
-// CHECK:         dxsa.add r<0, <y>>, r<0, <y>>, l(0x40400000)
-// CHECK:         dxsa.sync <uav_global|tgsm|threads>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
 // CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
+// CHECK:         dxsa.add r<0, <y>>, r<0, <y>>, l(0x40400000)
+// CHECK:         dxsa.sync <uav_global|tgsm|threads>
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]]
 // CHECK:         dxsa.sync <uav_global>
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/cs2.test b/mlir/test/Target/DXSA/hlsl/cs2.test
index eb98472de409..716279857b99 100644
--- a/mlir/test/Target/DXSA/hlsl/cs2.test
+++ b/mlir/test/Target/DXSA/hlsl/cs2.test
@@ -17,68 +17,74 @@
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <y>>, r<0, <x>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, vThreadIDInGroup<<z>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, vThreadIDInGroupFlattened<vector, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x00100022, 0x00000000, 0x0010000A, 0x00000000, 0x0011E006, 0x00000000]>
-// CHECK:         dxsa.add r<1, min16f, <x>>, r<0, <y>>, l(0x40000000)
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand.imm {imm = dense<4> : vector<1xi32>}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_1]] {min_precision = 1 : i32, num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]], %[[OPERAND_3]]
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_2]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
-// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
-// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
+// CHECK:         dxsa.add r<1, min16f, <x>>, r<0, <y>>, l(0x40000000)
 // CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]], %[[OPERAND_7]]
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand.imm {imm = dense<4> : vector<1xi32>}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_4]] {min_precision = 1 : i32, num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]]
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_5]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_7]], %[[OPERAND_8]], %[[OPERAND_9]], %[[OPERAND_10]]
 // CHECK:         dxsa.ftoi r<2, min16i, <x>>, r<0, <y>>
-// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_4]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
-// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
-// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand.imm {imm = dense<12> : vector<1xi32>}
-// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_5]] {min_precision = 4 : i32, num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_8]], %[[OPERAND_9]], %[[OPERAND_10]], %[[OPERAND_11]]
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_7]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand.imm {imm = dense<12> : vector<1xi32>}
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_8]] {min_precision = 4 : i32, num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_11]], %[[OPERAND_12]], %[[OPERAND_13]], %[[OPERAND_14]]
 // CHECK:         dxsa.sync <uav_global|tgsm|threads>
 // CHECK:         dxsa.iadd r<0, <z>>, vThreadIDInGroupFlattened<vector, <x>>, cb<[0, 0], vector, <x>>
-// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_6]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
-// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
-// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_12]], %[[OPERAND_13]], %[[OPERAND_14]], %[[OPERAND_15]]
-// CHECK:         dxsa.add r<0, <y>>, r<0, <w>>, r<0, <y>>
-// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_9]] {mask = 16 : i32, min_precision = 4 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_9]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand.imm {imm = dense<12> : vector<1xi32>}
+// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
 // CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
-// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_16]], %[[OPERAND_17]], %[[OPERAND_18]], %[[OPERAND_19]]
+// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_15]], %[[OPERAND_16]], %[[OPERAND_17]], %[[OPERAND_18]]
+// CHECK:         dxsa.add r<0, <y>>, r<0, <w>>, r<0, <y>>
+// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_12]] {mask = 16 : i32, min_precision = 4 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_13]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_21:.*]] = dxsa.operand.imm {imm = dense<12> : vector<1xi32>}
+// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_22:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_19]], %[[OPERAND_20]], %[[OPERAND_21]], %[[OPERAND_22]]
 // CHECK:         dxsa.itof r<0, <w>>, r<2, min16i, <x>>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <w>>, r<0, <y>>
 // CHECK:         dxsa.sync <tgsm|threads>
 // CHECK:         dxsa.sync <uav_global>
-// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_12]] {mask = 16 : i32, min_precision = 1 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_21:.*]] = dxsa.operand %[[INDEX_13]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_22:.*]] = dxsa.operand.imm {imm = dense<4> : vector<1xi32>}
-// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_23:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
-// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_20]], %[[OPERAND_21]], %[[OPERAND_22]], %[[OPERAND_23]]
-// CHECK:         dxsa.add r<0, <y>>, r<0, <y>>, r<1, min16f, <x>>
-// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_24:.*]] = dxsa.operand %[[INDEX_15]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_23:.*]] = dxsa.operand %[[INDEX_15]] {mask = 16 : i32, min_precision = 1 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_25:.*]] = dxsa.operand %[[INDEX_16]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_24:.*]] = dxsa.operand %[[INDEX_16]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_25:.*]] = dxsa.operand.imm {imm = dense<4> : vector<1xi32>}
 // CHECK:         %[[INDEX_17:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_26:.*]] = dxsa.operand %[[INDEX_17]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_24]], %[[OPERAND_25]], %[[OPERAND_26]]
+// CHECK:         %[[OPERAND_26:.*]] = dxsa.operand %[[INDEX_17]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_23]], %[[OPERAND_24]], %[[OPERAND_25]], %[[OPERAND_26]]
+// CHECK:         dxsa.add r<0, <y>>, r<0, <y>>, r<1, min16f, <x>>
+// CHECK:         %[[INDEX_18:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_27:.*]] = dxsa.operand %[[INDEX_18]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_19:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_28:.*]] = dxsa.operand %[[INDEX_19]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_20:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_29:.*]] = dxsa.operand %[[INDEX_20]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_27]], %[[OPERAND_28]], %[[OPERAND_29]]
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/cs4.test b/mlir/test/Target/DXSA/hlsl/cs4.test
index 291fc13e8caa..3645ca48a37c 100644
--- a/mlir/test/Target/DXSA/hlsl/cs4.test
+++ b/mlir/test/Target/DXSA/hlsl/cs4.test
@@ -17,15 +17,21 @@
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <y>>, r<0, <x>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, vThreadIDInGroup<<z>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, vThreadIDInGroupFlattened<vector, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x00100022, 0x00000000, 0x0010000A, 0x00000000, 0x0011E006, 0x00000000]>
-// CHECK:         dxsa.ftou r<0, <z>>, r<0, <y>>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand.imm {imm = dense<16> : vector<1xi32>}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]], %[[OPERAND_3]]
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
+// CHECK:         dxsa.ftou r<0, <z>>, r<0, <y>>
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand.imm {imm = dense<16> : vector<1xi32>}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]]
 // CHECK:         dxsa.mov r<1, <x>>, vThreadIDInGroupFlattened<vector, <x>>
 // CHECK:         dxsa.mov r<1, <y>>, l(0x10)
 // CHECK:         dxsa.imm_atomic_iadd r<2, <x>>, g<0>, r<1, <x, y, x, x>>, vThreadID<<x>>
@@ -38,22 +44,22 @@
 // CHECK:         dxsa.utof r<0, <z>>, r<1, <x>>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
 // CHECK:         dxsa.iadd r<0, <z>>, vThreadIDInGroupFlattened<vector, <x>>, cb<[0, 0], vector, <x>>
-// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_2]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand.imm {imm = dense<16> : vector<1xi32>}
-// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
-// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]], %[[OPERAND_7]]
-// CHECK:         dxsa.utof r<0, <z>>, r<0, <z>>
-// CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
 // CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_5]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_5]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand.imm {imm = dense<16> : vector<1xi32>}
 // CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_8]], %[[OPERAND_9]], %[[OPERAND_10]]
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_7]], %[[OPERAND_8]], %[[OPERAND_9]], %[[OPERAND_10]]
+// CHECK:         dxsa.utof r<0, <z>>, r<0, <z>>
+// CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_8]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_9]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_11]], %[[OPERAND_12]], %[[OPERAND_13]]
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/cs5.test b/mlir/test/Target/DXSA/hlsl/cs5.test
index 21b251f8bd07..6e6e5163b20d 100644
--- a/mlir/test/Target/DXSA/hlsl/cs5.test
+++ b/mlir/test/Target/DXSA/hlsl/cs5.test
@@ -17,68 +17,74 @@
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <y>>, r<0, <x>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, vThreadIDInGroup<<z>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, vThreadIDInGroupFlattened<vector, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x00100022, 0x00000000, 0x0010000A, 0x00000000, 0x0011E006, 0x00000000]>
-// CHECK:         dxsa.add r<1, min16f, <x>>, r<0, <y>>, l(0x40000000)
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand.imm {imm = dense<4> : vector<1xi32>}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_1]] {min_precision = 1 : i32, num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]], %[[OPERAND_3]]
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_2]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
-// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
-// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
+// CHECK:         dxsa.add r<1, min16f, <x>>, r<0, <y>>, l(0x40000000)
 // CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]], %[[OPERAND_7]]
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand.imm {imm = dense<4> : vector<1xi32>}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_4]] {min_precision = 1 : i32, num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]]
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_5]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_7]], %[[OPERAND_8]], %[[OPERAND_9]], %[[OPERAND_10]]
 // CHECK:         dxsa.ftoi r<2, min16i, <x>>, r<0, <y>>
-// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_4]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
-// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
-// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand.imm {imm = dense<12> : vector<1xi32>}
-// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_5]] {min_precision = 4 : i32, num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_8]], %[[OPERAND_9]], %[[OPERAND_10]], %[[OPERAND_11]]
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_7]] {mask = 16 : i32, num_components = 4 : i32, type = 31 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand  {num_components = 4 : i32, one = 0 : i32, type = 36 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand.imm {imm = dense<12> : vector<1xi32>}
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_8]] {min_precision = 4 : i32, num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_11]], %[[OPERAND_12]], %[[OPERAND_13]], %[[OPERAND_14]]
 // CHECK:         dxsa.sync <uav_global|tgsm|threads>
 // CHECK:         dxsa.iadd r<0, <z>>, vThreadIDInGroupFlattened<vector, <x>>, cb<[0, 0], vector, <x>>
-// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_6]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
-// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
-// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_12]], %[[OPERAND_13]], %[[OPERAND_14]], %[[OPERAND_15]]
-// CHECK:         dxsa.add r<0, <y>>, r<0, <w>>, r<0, <y>>
-// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_9]] {mask = 16 : i32, min_precision = 4 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_9]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand.imm {imm = dense<12> : vector<1xi32>}
+// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
 // CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
-// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_16]], %[[OPERAND_17]], %[[OPERAND_18]], %[[OPERAND_19]]
+// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_15]], %[[OPERAND_16]], %[[OPERAND_17]], %[[OPERAND_18]]
+// CHECK:         dxsa.add r<0, <y>>, r<0, <w>>, r<0, <y>>
+// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_12]] {mask = 16 : i32, min_precision = 4 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_13]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_21:.*]] = dxsa.operand.imm {imm = dense<12> : vector<1xi32>}
+// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_22:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_19]], %[[OPERAND_20]], %[[OPERAND_21]], %[[OPERAND_22]]
 // CHECK:         dxsa.itof r<0, <w>>, r<2, min16i, <x>>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <w>>, r<0, <y>>
 // CHECK:         dxsa.sync <tgsm|threads>
 // CHECK:         dxsa.sync <uav_global>
-// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_12]] {mask = 16 : i32, min_precision = 1 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_21:.*]] = dxsa.operand %[[INDEX_13]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_22:.*]] = dxsa.operand.imm {imm = dense<4> : vector<1xi32>}
-// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_23:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
-// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_20]], %[[OPERAND_21]], %[[OPERAND_22]], %[[OPERAND_23]]
-// CHECK:         dxsa.add r<0, <y>>, r<0, <y>>, r<1, min16f, <x>>
-// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_24:.*]] = dxsa.operand %[[INDEX_15]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_23:.*]] = dxsa.operand %[[INDEX_15]] {mask = 16 : i32, min_precision = 1 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_25:.*]] = dxsa.operand %[[INDEX_16]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_24:.*]] = dxsa.operand %[[INDEX_16]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_25:.*]] = dxsa.operand.imm {imm = dense<4> : vector<1xi32>}
 // CHECK:         %[[INDEX_17:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_26:.*]] = dxsa.operand %[[INDEX_17]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_24]], %[[OPERAND_25]], %[[OPERAND_26]]
+// CHECK:         %[[OPERAND_26:.*]] = dxsa.operand %[[INDEX_17]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 31 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_23]], %[[OPERAND_24]], %[[OPERAND_25]], %[[OPERAND_26]]
+// CHECK:         dxsa.add r<0, <y>>, r<0, <y>>, r<1, min16f, <x>>
+// CHECK:         %[[INDEX_18:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_27:.*]] = dxsa.operand %[[INDEX_18]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_19:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_28:.*]] = dxsa.operand %[[INDEX_19]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_20:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_29:.*]] = dxsa.operand %[[INDEX_20]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_27]], %[[OPERAND_28]], %[[OPERAND_29]]
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/gather.test b/mlir/test/Target/DXSA/hlsl/gather.test
index 999cd17fa79f..ac6a568ef3b1 100644
--- a/mlir/test/Target/DXSA/hlsl/gather.test
+++ b/mlir/test/Target/DXSA/hlsl/gather.test
@@ -10,10 +10,10 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 3
-// CHECK:         dxsa.unknown <tokens = [0x8B00006D, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8C00006D, 0x8000F601, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00101046, 0x00000000, 0x00107E46, 0x00000000, 0x0010601A, 0x00000000]>
+// CHECK:         dxsa.gather4 r<0>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>
+// CHECK:         dxsa.gather4 r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <y>>, <u = -5, v = 7, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x8E0000DB, 0x80005A01, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000]>
+// CHECK:         dxsa.gather4_s r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, r<2, <x>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
@@ -22,7 +22,7 @@
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1, <x, x, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8E0000DB, 0x80005A01, 0x80000202, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101246, 0x00000000, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000]>
+// CHECK:         dxsa.gather4_s r<1>, v<0, <x, y, z, x>>, t<1, vector>, s<0, vector, <z>>, r<2, <x>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
@@ -31,7 +31,7 @@
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_2]], %[[OPERAND_3]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1, <x, x, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000DB, 0x80000282, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101E46, 0x00000000, 0x00107E46, 0x00000002, 0x0010602A, 0x00000000]>
+// CHECK:         dxsa.gather4_s r<1>, v<0>, t<2, vector>, s<0, vector, <z>>, r<2, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
diff --git a/mlir/test/Target/DXSA/hlsl/gather_cmp.test b/mlir/test/Target/DXSA/hlsl/gather_cmp.test
index 4695080f05cc..4d7d6f1522dd 100644
--- a/mlir/test/Target/DXSA/hlsl/gather_cmp.test
+++ b/mlir/test/Target/DXSA/hlsl/gather_cmp.test
@@ -10,10 +10,10 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 3
-// CHECK:         dxsa.unknown <tokens = [0x8D00007E, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000, 0x0010101A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8E00007E, 0x8000F601, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00101046, 0x00000000, 0x00107E46, 0x00000000, 0x0010601A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_c r<0>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>, v<0, <y>>
+// CHECK:         dxsa.gather4_c r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <y>>, v<0, <y>>, <u = -5, v = 7, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x900000DC, 0x80005A01, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_c_s r<1>, v<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, v<0, <y>>, r<2, <x>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
@@ -22,7 +22,7 @@
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1, <x, x, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x900000DC, 0x80005A01, 0x80000202, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101246, 0x00000000, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_c_s r<1>, v<0, <x, y, z, x>>, t<1, vector>, s<0, vector, <z>>, v<0, <y>>, r<2, <x>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
@@ -31,7 +31,7 @@
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_2]], %[[OPERAND_3]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1, <x, x, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000DC, 0x80000282, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101E46, 0x00000000, 0x00107E46, 0x00000002, 0x0010602A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_c_s r<1>, v<0>, t<2, vector>, s<0, vector, <z>>, v<0, <y>>, r<2, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
diff --git a/mlir/test/Target/DXSA/hlsl/gather_po.test b/mlir/test/Target/DXSA/hlsl/gather_po.test
index 002da4e12a56..243f21b7babf 100644
--- a/mlir/test/Target/DXSA/hlsl/gather_po.test
+++ b/mlir/test/Target/DXSA/hlsl/gather_po.test
@@ -11,32 +11,32 @@
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 6
 // CHECK:         dxsa.ftoi r<0>, v<1>
-// CHECK:         dxsa.unknown <tokens = [0x8D00007F, 0x800000C2, 0x00155543, 0x00100012, 0x00000001, 0x00101046, 0x00000000, 0x00100046, 0x00000000, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8D00007F, 0x800000C2, 0x00155543, 0x00100022, 0x00000001, 0x00101046, 0x00000000, 0x00100AE6, 0x00000000, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000]>
+// CHECK:         dxsa.gather4_po r<1, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>
+// CHECK:         dxsa.gather4_po r<1, <y>>, v<0, <x, y, x, x>>, r<0, <z, w, z, z>>, t<0, vector>, s<0, vector, <x>>
 // CHECK:         dxsa.ftoi r<2>, v<0>
-// CHECK:         dxsa.unknown <tokens = [0x8D00007F, 0x800000C2, 0x00155543, 0x00100042, 0x00000001, 0x00101046, 0x00000000, 0x00100046, 0x00000002, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8D00007F, 0x800000C2, 0x00155543, 0x00100082, 0x00000001, 0x00101046, 0x00000000, 0x00100AE6, 0x00000002, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000DD, 0x800000C2, 0x00155543, 0x00100012, 0x00000003, 0x00100012, 0x00000004, 0x00101046, 0x00000000, 0x00100046, 0x00000000, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000]>
+// CHECK:         dxsa.gather4_po r<1, <z>>, v<0, <x, y, x, x>>, r<2, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>
+// CHECK:         dxsa.gather4_po r<1, <w>>, v<0, <x, y, x, x>>, r<2, <z, w, z, z>>, t<0, vector>, s<0, vector, <x>>
+// CHECK:         dxsa.gather4_po_s r<3, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, r<4, <x>>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
-// CHECK:         dxsa.unknown <tokens = [0x8F0000DD, 0x800000C2, 0x00155543, 0x00100022, 0x00000003, 0x00100012, 0x00000005, 0x00101046, 0x00000000, 0x00100AE6, 0x00000000, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_s r<3, <y>>, v<0, <x, y, x, x>>, r<0, <z, w, z, z>>, t<0, vector>, s<0, vector, <w>>, r<5, <x>>
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 5 : i32}
 // CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_2]], %[[OPERAND_3]]
 // CHECK:         dxsa.and r<4, <x>>, r<4, <y>>, r<4, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000DD, 0x800000C2, 0x00155543, 0x00100042, 0x00000003, 0x00100012, 0x00000005, 0x00101046, 0x00000000, 0x00100046, 0x00000002, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_s r<3, <z>>, v<0, <x, y, x, x>>, r<2, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, r<5, <x>>
 // CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 5 : i32}
 // CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_4]], %[[OPERAND_5]]
 // CHECK:         dxsa.and r<4, <x>>, r<4, <y>>, r<4, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000DD, 0x800000C2, 0x00155543, 0x00100082, 0x00000003, 0x00100012, 0x00000005, 0x00101046, 0x00000000, 0x00100AE6, 0x00000002, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_s r<3, <w>>, v<0, <x, y, x, x>>, r<2, <z, w, z, z>>, t<0, vector>, s<0, vector, <w>>, r<5, <x>>
 // CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_6]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 5 : i32}
@@ -46,8 +46,8 @@
 // CHECK:         dxsa.utof r<4, <x>>, r<4, <x>>
 // CHECK:         dxsa.add r<1>, r<1>, r<3>
 // CHECK:         dxsa.add r<1>, r<4, <x, x, x, x>>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000DD, 0x80000202, 0x00155543, 0x00100012, 0x00000003, 0x00100012, 0x00000000, 0x00101246, 0x00000000, 0x00100046, 0x00000000, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000DD, 0x80000202, 0x00155543, 0x00100022, 0x00000003, 0x00100012, 0x00000004, 0x00101246, 0x00000000, 0x00100AE6, 0x00000000, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_s r<3, <x>>, v<0, <x, y, z, x>>, r<0, <x, y, x, x>>, t<1, vector>, s<0, vector, <z>>, r<0, <x>>
+// CHECK:         dxsa.gather4_po_s r<3, <y>>, v<0, <x, y, z, x>>, r<0, <z, w, z, z>>, t<1, vector>, s<0, vector, <z>>, r<4, <x>>
 // CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 0 : i32}
 // CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_8]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 0 : i32}
@@ -59,8 +59,8 @@
 // CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_10]], %[[OPERAND_11]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <y>>, r<0, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000DD, 0x80000202, 0x00155543, 0x00100042, 0x00000003, 0x00100012, 0x00000002, 0x00101246, 0x00000000, 0x00100046, 0x00000002, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000DD, 0x80000202, 0x00155543, 0x00100082, 0x00000003, 0x00100012, 0x00000004, 0x00101246, 0x00000000, 0x00100AE6, 0x00000002, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_s r<3, <z>>, v<0, <x, y, z, x>>, r<2, <x, y, x, x>>, t<1, vector>, s<0, vector, <z>>, r<2, <x>>
+// CHECK:         dxsa.gather4_po_s r<3, <w>>, v<0, <x, y, z, x>>, r<2, <z, w, z, z>>, t<1, vector>, s<0, vector, <z>>, r<4, <x>>
 // CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 0 : i32}
 // CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_12]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 2 : i32}
diff --git a/mlir/test/Target/DXSA/hlsl/gather_po_cmp.test b/mlir/test/Target/DXSA/hlsl/gather_po_cmp.test
index 5d39d4963f35..2dcff2cf5a00 100644
--- a/mlir/test/Target/DXSA/hlsl/gather_po_cmp.test
+++ b/mlir/test/Target/DXSA/hlsl/gather_po_cmp.test
@@ -11,32 +11,32 @@
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 6
 // CHECK:         dxsa.ftoi r<0>, v<1>
-// CHECK:         dxsa.unknown <tokens = [0x8F000080, 0x800000C2, 0x00155543, 0x00100012, 0x00000001, 0x00101046, 0x00000000, 0x00100046, 0x00000000, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000, 0x0010101A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8F000080, 0x800000C2, 0x00155543, 0x00100022, 0x00000001, 0x00101046, 0x00000000, 0x00100AE6, 0x00000000, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_c r<1, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>, v<0, <y>>
+// CHECK:         dxsa.gather4_po_c r<1, <y>>, v<0, <x, y, x, x>>, r<0, <z, w, z, z>>, t<0, vector>, s<0, vector, <x>>, v<0, <y>>
 // CHECK:         dxsa.ftoi r<2>, v<0>
-// CHECK:         dxsa.unknown <tokens = [0x8F000080, 0x800000C2, 0x00155543, 0x00100042, 0x00000001, 0x00101046, 0x00000000, 0x00100046, 0x00000002, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000, 0x0010101A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8F000080, 0x800000C2, 0x00155543, 0x00100082, 0x00000001, 0x00101046, 0x00000000, 0x00100AE6, 0x00000002, 0x00107E46, 0x00000000, 0x0010600A, 0x00000000, 0x0010101A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x910000DE, 0x800000C2, 0x00155543, 0x00100012, 0x00000003, 0x00100012, 0x00000004, 0x00101046, 0x00000000, 0x00100046, 0x00000000, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_c r<1, <z>>, v<0, <x, y, x, x>>, r<2, <x, y, x, x>>, t<0, vector>, s<0, vector, <x>>, v<0, <y>>
+// CHECK:         dxsa.gather4_po_c r<1, <w>>, v<0, <x, y, x, x>>, r<2, <z, w, z, z>>, t<0, vector>, s<0, vector, <x>>, v<0, <y>>
+// CHECK:         dxsa.gather4_po_c_s r<3, <x>>, v<0, <x, y, x, x>>, r<0, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, v<0, <y>>, r<4, <x>>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
-// CHECK:         dxsa.unknown <tokens = [0x910000DE, 0x800000C2, 0x00155543, 0x00100022, 0x00000003, 0x00100012, 0x00000005, 0x00101046, 0x00000000, 0x00100AE6, 0x00000000, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_c_s r<3, <y>>, v<0, <x, y, x, x>>, r<0, <z, w, z, z>>, t<0, vector>, s<0, vector, <w>>, v<0, <y>>, r<5, <x>>
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 5 : i32}
 // CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_2]], %[[OPERAND_3]]
 // CHECK:         dxsa.and r<4, <x>>, r<4, <y>>, r<4, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x910000DE, 0x800000C2, 0x00155543, 0x00100042, 0x00000003, 0x00100012, 0x00000005, 0x00101046, 0x00000000, 0x00100046, 0x00000002, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_c_s r<3, <z>>, v<0, <x, y, x, x>>, r<2, <x, y, x, x>>, t<0, vector>, s<0, vector, <w>>, v<0, <y>>, r<5, <x>>
 // CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 5 : i32}
 // CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_4]], %[[OPERAND_5]]
 // CHECK:         dxsa.and r<4, <x>>, r<4, <y>>, r<4, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x910000DE, 0x800000C2, 0x00155543, 0x00100082, 0x00000003, 0x00100012, 0x00000005, 0x00101046, 0x00000000, 0x00100AE6, 0x00000002, 0x00107E46, 0x00000000, 0x0010603A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_c_s r<3, <w>>, v<0, <x, y, x, x>>, r<2, <z, w, z, z>>, t<0, vector>, s<0, vector, <w>>, v<0, <y>>, r<5, <x>>
 // CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 4 : i32}
 // CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_6]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 5 : i32}
@@ -46,8 +46,8 @@
 // CHECK:         dxsa.utof r<4, <x>>, r<4, <x>>
 // CHECK:         dxsa.add r<1>, r<1>, r<3>
 // CHECK:         dxsa.add r<1>, r<4, <x, x, x, x>>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x910000DE, 0x80000202, 0x00155543, 0x00100012, 0x00000003, 0x00100012, 0x00000000, 0x00101246, 0x00000000, 0x00100046, 0x00000000, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000, 0x0010101A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x910000DE, 0x80000202, 0x00155543, 0x00100022, 0x00000003, 0x00100012, 0x00000004, 0x00101246, 0x00000000, 0x00100AE6, 0x00000000, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_c_s r<3, <x>>, v<0, <x, y, z, x>>, r<0, <x, y, x, x>>, t<1, vector>, s<0, vector, <z>>, v<0, <y>>, r<0, <x>>
+// CHECK:         dxsa.gather4_po_c_s r<3, <y>>, v<0, <x, y, z, x>>, r<0, <z, w, z, z>>, t<1, vector>, s<0, vector, <z>>, v<0, <y>>, r<4, <x>>
 // CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 0 : i32}
 // CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_8]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 0 : i32}
@@ -59,8 +59,8 @@
 // CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_10]], %[[OPERAND_11]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <y>>, r<0, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x910000DE, 0x80000202, 0x00155543, 0x00100042, 0x00000003, 0x00100012, 0x00000002, 0x00101246, 0x00000000, 0x00100046, 0x00000002, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000, 0x0010101A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x910000DE, 0x80000202, 0x00155543, 0x00100082, 0x00000003, 0x00100012, 0x00000004, 0x00101246, 0x00000000, 0x00100AE6, 0x00000002, 0x00107E46, 0x00000001, 0x0010602A, 0x00000000, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.gather4_po_c_s r<3, <z>>, v<0, <x, y, z, x>>, r<2, <x, y, x, x>>, t<1, vector>, s<0, vector, <z>>, v<0, <y>>, r<2, <x>>
+// CHECK:         dxsa.gather4_po_c_s r<3, <w>>, v<0, <x, y, z, x>>, r<2, <z, w, z, z>>, t<1, vector>, s<0, vector, <z>>, v<0, <y>>, r<4, <x>>
 // CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 0 : i32}
 // CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_12]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
 // CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 2 : i32}
diff --git a/mlir/test/Target/DXSA/hlsl/getdim.test b/mlir/test/Target/DXSA/hlsl/getdim.test
index fdb3a198ad49..4a3ac0ecc36c 100644
--- a/mlir/test/Target/DXSA/hlsl/getdim.test
+++ b/mlir/test/Target/DXSA/hlsl/getdim.test
@@ -12,44 +12,77 @@
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 2
 // CHECK:         dxsa.ftou r<0, <x>>, v<0, <w>>
-// CHECK:         dxsa.unknown <tokens = [0x8900103D, 0x800000C2, 0x00155543, 0x001000E2, 0x00000000, 0x0010000A, 0x00000000, 0x00107D26, 0x00000000]>
+// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 224 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<[2, 0, 1, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "resinfo" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
 // CHECK:         dxsa.iadd r<0, <y>>, r<0, <y>>, r<0, <x>>
 // CHECK:         dxsa.iadd r<0, <y>>, r<0, <z>>, r<0, <y>>
 // CHECK:         dxsa.iadd r<0, <y>>, r<0, <w>>, r<0, <y>>
-// CHECK:         dxsa.unknown <tokens = [0x8900103D, 0x800000C2, 0x00155543, 0x00100032, 0x00000001, 0x00004001, 0x00000000, 0x00107E46, 0x00000000]>
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 48 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "resinfo" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]]
 // CHECK:         dxsa.iadd r<0, <z>>, r<0, <x>>, r<1, <x>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <y>>, r<0, <z>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<0, <w>>, r<0, <z>>
 // CHECK:         dxsa.utof r<0, <y, z>>, r<0, <y, y, z, y>>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
-// CHECK:         dxsa.unknown <tokens = [0x8900103D, 0x80000202, 0x00155543, 0x001000F2, 0x00000001, 0x0010000A, 0x00000000, 0x00107E46, 0x00000001]>
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_5]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "resinfo" %[[OPERAND_6]], %[[OPERAND_7]], %[[OPERAND_8]]
 // CHECK:         dxsa.iadd r<0, <z>>, r<0, <x>>, r<1, <x>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <y>>, r<0, <z>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <z>>, r<0, <z>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <w>>, r<0, <z>>
 // CHECK:         dxsa.utof r<0, <z>>, r<0, <z>>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
-// CHECK:         dxsa.unknown <tokens = [0x8900103D, 0x80000282, 0x00155543, 0x001000F2, 0x00000001, 0x0010000A, 0x00000000, 0x00107E46, 0x00000002]>
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_8]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_9]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "resinfo" %[[OPERAND_9]], %[[OPERAND_10]], %[[OPERAND_11]]
 // CHECK:         dxsa.iadd r<0, <z>>, r<0, <x>>, r<1, <x>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <y>>, r<0, <z>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <z>>, r<0, <z>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <w>>, r<0, <z>>
 // CHECK:         dxsa.utof r<0, <z>>, r<0, <z>>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
-// CHECK:         dxsa.unknown <tokens = [0x8900103D, 0x80000242, 0x00155543, 0x00100072, 0x00000001, 0x00004001, 0x00000000, 0x00107E46, 0x00000003]>
+// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_11]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_12]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "resinfo" %[[OPERAND_12]], %[[OPERAND_13]], %[[OPERAND_14]]
 // CHECK:         dxsa.iadd r<0, <z>>, r<0, <x>>, r<1, <x>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <y>>, r<0, <z>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <z>>, r<0, <z>>
 // CHECK:         dxsa.iadd r<0, <z>>, r<1, <w>>, r<0, <z>>
-// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 3 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 7 : i32}
-// CHECK:         dxsa.instruction "sampleinfo" %[[OPERAND_0]], %[[OPERAND_1]]
+// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_13]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, one = 0 : i32, type = 7 : i32}
+// CHECK:         dxsa.instruction "sampleinfo" %[[OPERAND_15]], %[[OPERAND_16]]
 // CHECK:         dxsa.iadd r<0, <z>>, r<0, <w>>, r<0, <z>>
 // CHECK:         dxsa.utof r<0, <z>>, r<0, <z>>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
-// CHECK:         dxsa.unknown <tokens = [0x8900103D, 0x800000C2, 0x00155543, 0x00100032, 0x00000001, 0x00004001, 0x00000000, 0x0011EE46, 0x00000001]>
+// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_15]] {mask = 48 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_16]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "resinfo" %[[OPERAND_17]], %[[OPERAND_18]], %[[OPERAND_19]]
 // CHECK:         dxsa.iadd r<0, <x>>, r<0, <x>>, r<1, <x>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<1, <y>>, r<0, <x>>
 // CHECK:         dxsa.iadd r<0, <x>>, r<1, <z>>, r<0, <x>>
diff --git a/mlir/test/Target/DXSA/hlsl/icb1.test b/mlir/test/Target/DXSA/hlsl/icb1.test
index 7f1e4070752f..abf1ec0f4f92 100644
--- a/mlir/test/Target/DXSA/hlsl/icb1.test
+++ b/mlir/test/Target/DXSA/hlsl/icb1.test
@@ -18,3 +18,4 @@
 // CHECK:         dxsa.dp4 r<1, <w>>, v<3>, icb<r<0, <y>>, vector>
 // CHECK:         dxsa.dp4 o<0, <x>>, r<1>, icb<r<0, <x>>, vector>
 // CHECK:         dxsa.ret
+
diff --git a/mlir/test/Target/DXSA/hlsl/interface1.test b/mlir/test/Target/DXSA/hlsl/interface1.test
index 87cd41676e6d..9655843abadc 100644
--- a/mlir/test/Target/DXSA/hlsl/interface1.test
+++ b/mlir/test/Target/DXSA/hlsl/interface1.test
@@ -17,14 +17,14 @@
 // CHECK:         dxsa.ret
 // CHECK:         dxsa.label fb<0>
 // CHECK:         dxsa.mov r<0, <z, w>>, thisPtr<r<0, <x>>, vector, <z, z, z, w>>
-// CHECK:         dxsa.unknown <tokens = [0x90000045, 0x800000C2, 0x00155543, 0x00100042, 0x00000000, 0x00004002, 0x3E000000, 0x3F600000, 0x00000000, 0x00000000, 0x00907C96, 0x0010002A, 0x00000000, 0x00906000, 0x0010003A, 0x00000000]>
+// CHECK:         dxsa.sample r<0, <z>>, l(0x3E000000, 0x3F600000, 0x0, 0x0), t<r<0, <z>>, vector, <y, z, x, w>>, s<r<0, <w>>>
 // CHECK:         dxsa.mov r<0, <w>>, thisPtr<r<0, <x>>, vector, <y>>
 // CHECK:         dxsa.mov r<1, <x>>, thisPtr<r<0, <x>>, vector, <x>>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, cb<[r<1, <x>>, r<0, <w>>], vector, <x>>
 // CHECK:         dxsa.ret
 // CHECK:         dxsa.label fb<1>
 // CHECK:         dxsa.mov r<0, <z, w>>, thisPtr<r<0, <x>>, vector, <z, z, z, w>>
-// CHECK:         dxsa.unknown <tokens = [0x90000045, 0x800000C2, 0x00155543, 0x00100042, 0x00000000, 0x00004002, 0x3E800000, 0x3F400000, 0x00000000, 0x00000000, 0x00907C96, 0x0010002A, 0x00000000, 0x00906000, 0x0010003A, 0x00000000]>
+// CHECK:         dxsa.sample r<0, <z>>, l(0x3E800000, 0x3F400000, 0x0, 0x0), t<r<0, <z>>, vector, <y, z, x, w>>, s<r<0, <w>>>
 // CHECK:         dxsa.mov r<0, <w>>, thisPtr<r<0, <x>>, vector, <y>>
 // CHECK:         dxsa.mov r<0, <x>>, thisPtr<r<0, <x>>, vector, <x>>
 // CHECK:         dxsa.mul r<0, <y>>, r<0, <z>>, cb<[r<0, <x>>, r<0, <w>>], vector, <x>>
diff --git a/mlir/test/Target/DXSA/hlsl/nonuniform1.test b/mlir/test/Target/DXSA/hlsl/nonuniform1.test
index 5d9d0831c076..6e9e127ba578 100644
--- a/mlir/test/Target/DXSA/hlsl/nonuniform1.test
+++ b/mlir/test/Target/DXSA/hlsl/nonuniform1.test
@@ -11,38 +11,10 @@
 // CHECK:         dxsa.dcl_temps 2
 // CHECK:         dxsa.itof r<0, <x>>, v<0, <x>>
 // CHECK:         dxsa.mov r<0, <y>>, v<0, <x>>
-// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 0 : i32}
-// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_4:.*]] = dxsa.index.rel.imm %[[OPERAND_2]] {imm = 3 : i32, op = "add"}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_2]], %[[INDEX_4]] {non_uniform = 1 : i32, num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
-// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_7:.*]] = dxsa.index.rel.imm %[[OPERAND_4]] {imm = 2 : i32, op = "add"}
-// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]], %[[INDEX_7]] {non_uniform = 1 : i32, num_components = 0 : i32, type = 6 : i32}
-// CHECK:         dxsa.instruction "sample" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_3]], %[[OPERAND_5]]
+// CHECK:         dxsa.sample r<1>, r<0, <x, x, x, x>>, t<[0, 3 + r<0, <y>>], vector, nonuniform>, s<[0, 2 + r<0, <y>>], nonuniform>
 // CHECK:         dxsa.ftou r<0, <x>>, v<1, <x>>
 // CHECK:         dxsa.add r<0, <z>>, v<1, <x>>, l(0x40000000)
-// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_8]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_9]] {num_components = 4 : i32, swizzle = dense<2> : vector<4xi32>, type = 0 : i32}
-// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_12:.*]] = dxsa.index.rel.imm %[[OPERAND_8]] {imm = 3 : i32, op = "add"}
-// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_10]], %[[INDEX_12]] {non_uniform = 1 : i32, num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
-// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_15:.*]] = dxsa.index.rel.imm %[[OPERAND_10]] {imm = 2 : i32, op = "add"}
-// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_13]], %[[INDEX_15]] {num_components = 0 : i32, type = 6 : i32}
-// CHECK:         dxsa.instruction "sample" %[[OPERAND_6]], %[[OPERAND_7]], %[[OPERAND_9]], %[[OPERAND_11]]
+// CHECK:         dxsa.sample r<0>, r<0, <z, z, z, z>>, t<[0, 3 + r<0, <x>>], vector, nonuniform>, s<[0, 2 + r<0, <y>>]>
 // CHECK:         dxsa.add o<0>, r<0>, r<1>
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/precise1.test b/mlir/test/Target/DXSA/hlsl/precise1.test
index 5c19474e267f..f8a9c53ff4ba 100644
--- a/mlir/test/Target/DXSA/hlsl/precise1.test
+++ b/mlir/test/Target/DXSA/hlsl/precise1.test
@@ -9,7 +9,7 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0, <x, y>>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 1
-// CHECK:         dxsa.unknown <tokens = [0x8B780045, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000000, 0x00106000, 0x00000000]>
+// CHECK:         dxsa.sample r<0>, v<0, <x, y, x, x>>, t<0, vector>, s<0>
 // CHECK:         dxsa.mul precise <x, y, z, w> r<0>, r<0>, cb<[0, 0], vector>
 // CHECK:         dxsa.mad precise <x, y, z, w> r<0>, r<0>, cb<[0, 1], vector>, cb<[0, 2], vector>
 // CHECK:         dxsa.mov precise <x, y, z, w> o<0>, -r<0>
diff --git a/mlir/test/Target/DXSA/hlsl/raw_buf1.test b/mlir/test/Target/DXSA/hlsl/raw_buf1.test
index ac21e634bf5c..58e200812c02 100644
--- a/mlir/test/Target/DXSA/hlsl/raw_buf1.test
+++ b/mlir/test/Target/DXSA/hlsl/raw_buf1.test
@@ -10,65 +10,177 @@
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 16
 // CHECK:         dxsa.ftou r<0, <x, y>>, v<0, <x, y, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x00100042, 0x00000000, 0x0010000A, 0x00000000, 0x0011E006, 0x00000001]>
+// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
 // CHECK:         dxsa.add r<1, <x, y, z>>, v<0, <x, x, x, x>>, l(0x3F800000, 0x40000000, 0x40400000, 0x0)
 // CHECK:         dxsa.ftou r<1, <x, y, z>>, r<1, <x, y, z, x>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x00100032, 0x00000002, 0x0010000A, 0x00000001, 0x0011E046, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x00100072, 0x00000003, 0x0010001A, 0x00000001, 0x0011E246, 0x00000001]>
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 48 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<[0, 1, 0, 0]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]]
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_6]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 0]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_6]], %[[OPERAND_7]], %[[OPERAND_8]]
 // CHECK:         dxsa.utof r<3, <x, y, z>>, r<3, <x, y, z, x>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x001000F2, 0x00000004, 0x0010002A, 0x00000001, 0x0011EE46, 0x00000001]>
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_9]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_9]], %[[OPERAND_10]], %[[OPERAND_11]]
 // CHECK:         dxsa.utof r<4>, r<4>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000E2, 0x800002C2, 0x00199983, 0x00100012, 0x00000005, 0x00100012, 0x00000006, 0x0010000A, 0x00000000, 0x0011E006, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000E2, 0x800002C2, 0x00199983, 0x00100012, 0x00000007, 0x00100012, 0x00000008, 0x0010000A, 0x00000001, 0x0011E006, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000E2, 0x800002C2, 0x00199983, 0x00100012, 0x00000009, 0x00100012, 0x0000000A, 0x0010001A, 0x00000001, 0x0011E006, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000E2, 0x800002C2, 0x00199983, 0x00100012, 0x0000000B, 0x00100012, 0x0000000C, 0x0010002A, 0x00000001, 0x0011E006, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x00100082, 0x00000000, 0x0010000A, 0x00000000, 0x00107006, 0x00000000]>
+// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 5 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_12]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 6 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_13]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_15]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw_s" %[[OPERAND_12]], %[[OPERAND_13]], %[[OPERAND_14]], %[[OPERAND_15]]
+// CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 7 : i32}
+// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_16]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_17:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_17]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_18:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand %[[INDEX_18]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_19:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_19]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw_s" %[[OPERAND_16]], %[[OPERAND_17]], %[[OPERAND_18]], %[[OPERAND_19]]
+// CHECK:         %[[INDEX_20:.*]] = dxsa.index.imm {imm = 9 : i32}
+// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_20]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_21:.*]] = dxsa.index.imm {imm = 10 : i32}
+// CHECK:         %[[OPERAND_21:.*]] = dxsa.operand %[[INDEX_21]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_22:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_22:.*]] = dxsa.operand %[[INDEX_22]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_23:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_23:.*]] = dxsa.operand %[[INDEX_23]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw_s" %[[OPERAND_20]], %[[OPERAND_21]], %[[OPERAND_22]], %[[OPERAND_23]]
+// CHECK:         %[[INDEX_24:.*]] = dxsa.index.imm {imm = 11 : i32}
+// CHECK:         %[[OPERAND_24:.*]] = dxsa.operand %[[INDEX_24]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_25:.*]] = dxsa.index.imm {imm = 12 : i32}
+// CHECK:         %[[OPERAND_25:.*]] = dxsa.operand %[[INDEX_25]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_26:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_26:.*]] = dxsa.operand %[[INDEX_26]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_27:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_27:.*]] = dxsa.operand %[[INDEX_27]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw_s" %[[OPERAND_24]], %[[OPERAND_25]], %[[OPERAND_26]], %[[OPERAND_27]]
+// CHECK:         %[[INDEX_28:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_28:.*]] = dxsa.operand %[[INDEX_28]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_29:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_29:.*]] = dxsa.operand %[[INDEX_29]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_30:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_30:.*]] = dxsa.operand %[[INDEX_30]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_28]], %[[OPERAND_29]], %[[OPERAND_30]]
 // CHECK:         dxsa.utof r<13, min16f, <x>>, r<0, <w>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x001000C2, 0x00000002, 0x0010000A, 0x00000001, 0x00107406, 0x00000000]>
+// CHECK:         %[[INDEX_31:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_31:.*]] = dxsa.operand %[[INDEX_31]] {mask = 192 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_32:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_32:.*]] = dxsa.operand %[[INDEX_32]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_33:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_33:.*]] = dxsa.operand %[[INDEX_33]] {num_components = 4 : i32, swizzle = dense<[0, 0, 0, 1]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_31]], %[[OPERAND_32]], %[[OPERAND_33]]
 // CHECK:         dxsa.utof r<2>, r<2>
 // CHECK:         dxsa.add r<2, <z, w>>, r<2, <z, z, z, w>>, r<13, min16f, <x, x, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x001000E2, 0x00000005, 0x0010001A, 0x00000001, 0x00107906, 0x00000000]>
+// CHECK:         %[[INDEX_34:.*]] = dxsa.index.imm {imm = 5 : i32}
+// CHECK:         %[[OPERAND_34:.*]] = dxsa.operand %[[INDEX_34]] {mask = 224 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_35:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_35:.*]] = dxsa.operand %[[INDEX_35]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_36:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_36:.*]] = dxsa.operand %[[INDEX_36]] {num_components = 4 : i32, swizzle = dense<[0, 0, 1, 2]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_34]], %[[OPERAND_35]], %[[OPERAND_36]]
 // CHECK:         dxsa.utof r<5, <y, z, w>>, r<5, <y, y, z, w>>
 // CHECK:         dxsa.add r<14, <x, y>>, r<2, <z, w, z, z>>, r<5, <y, z, y, y>>
 // CHECK:         dxsa.add r<14, <z>>, r<5, <w>>, r<13, min16f, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x001000F2, 0x0000000F, 0x0010002A, 0x00000001, 0x00107E46, 0x00000000]>
+// CHECK:         %[[INDEX_37:.*]] = dxsa.index.imm {imm = 15 : i32}
+// CHECK:         %[[OPERAND_37:.*]] = dxsa.operand %[[INDEX_37]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_38:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_38:.*]] = dxsa.operand %[[INDEX_38]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_39:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_39:.*]] = dxsa.operand %[[INDEX_39]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_37]], %[[OPERAND_38]], %[[OPERAND_39]]
 // CHECK:         dxsa.utof r<15>, r<15>
 // CHECK:         dxsa.add r<14, <x, y, z>>, r<14, <x, y, z, x>>, r<15, <x, y, z, x>>
 // CHECK:         dxsa.add r<14, <w>>, r<13, min16f, <x>>, r<15, <w>>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000E2, 0x800002C2, 0x00199983, 0x00100012, 0x00000000, 0x00100012, 0x0000000F, 0x0010000A, 0x00000000, 0x00107006, 0x00000000]>
-// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 15 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
+// CHECK:         %[[INDEX_40:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_40:.*]] = dxsa.operand %[[INDEX_40]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_41:.*]] = dxsa.index.imm {imm = 15 : i32}
+// CHECK:         %[[OPERAND_41:.*]] = dxsa.operand %[[INDEX_41]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_42:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_42:.*]] = dxsa.operand %[[INDEX_42]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_43:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_43:.*]] = dxsa.operand %[[INDEX_43]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_raw_s" %[[OPERAND_40]], %[[OPERAND_41]], %[[OPERAND_42]], %[[OPERAND_43]]
+// CHECK:         %[[INDEX_44:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_44:.*]] = dxsa.operand %[[INDEX_44]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_45:.*]] = dxsa.index.imm {imm = 15 : i32}
+// CHECK:         %[[OPERAND_45:.*]] = dxsa.operand %[[INDEX_45]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_44]], %[[OPERAND_45]]
 // CHECK:         dxsa.utof r<0, <x, z, w>>, r<0, <x, x, z, w>>
 // CHECK:         dxsa.add r<13>, r<0, <x, x, x, x>>, r<14>
 // CHECK:         dxsa.add r<13>, r<0, <w, w, w, w>>, r<13>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000E2, 0x800002C2, 0x00199983, 0x00100012, 0x00000000, 0x00100012, 0x00000001, 0x0010000A, 0x00000001, 0x00107006, 0x00000000]>
-// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_2]], %[[OPERAND_3]]
+// CHECK:         %[[INDEX_46:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_46:.*]] = dxsa.operand %[[INDEX_46]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_47:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_47:.*]] = dxsa.operand %[[INDEX_47]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_48:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_48:.*]] = dxsa.operand %[[INDEX_48]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_49:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_49:.*]] = dxsa.operand %[[INDEX_49]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_raw_s" %[[OPERAND_46]], %[[OPERAND_47]], %[[OPERAND_48]], %[[OPERAND_49]]
+// CHECK:         %[[INDEX_50:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_50:.*]] = dxsa.operand %[[INDEX_50]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_51:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_51:.*]] = dxsa.operand %[[INDEX_51]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_50]], %[[OPERAND_51]]
 // CHECK:         dxsa.utof r<0, <x, w>>, r<0, <x, x, x, w>>
 // CHECK:         dxsa.add r<13, <x, y>>, r<0, <x, x, x, x>>, r<13, <x, y, x, x>>
 // CHECK:         dxsa.add r<13>, r<0, <w, w, w, w>>, r<13>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000E2, 0x800002C2, 0x00199983, 0x00100012, 0x00000000, 0x00100012, 0x00000001, 0x0010001A, 0x00000001, 0x00107006, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000E2, 0x800002C2, 0x00199983, 0x00100012, 0x0000000E, 0x00100012, 0x0000000F, 0x0010002A, 0x00000001, 0x00107006, 0x00000000]>
-// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_4]], %[[OPERAND_5]]
+// CHECK:         %[[INDEX_52:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_52:.*]] = dxsa.operand %[[INDEX_52]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_53:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_53:.*]] = dxsa.operand %[[INDEX_53]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_54:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_54:.*]] = dxsa.operand %[[INDEX_54]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_55:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_55:.*]] = dxsa.operand %[[INDEX_55]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_raw_s" %[[OPERAND_52]], %[[OPERAND_53]], %[[OPERAND_54]], %[[OPERAND_55]]
+// CHECK:         %[[INDEX_56:.*]] = dxsa.index.imm {imm = 14 : i32}
+// CHECK:         %[[OPERAND_56:.*]] = dxsa.operand %[[INDEX_56]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_57:.*]] = dxsa.index.imm {imm = 15 : i32}
+// CHECK:         %[[OPERAND_57:.*]] = dxsa.operand %[[INDEX_57]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_58:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_58:.*]] = dxsa.operand %[[INDEX_58]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_59:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_59:.*]] = dxsa.operand %[[INDEX_59]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_raw_s" %[[OPERAND_56]], %[[OPERAND_57]], %[[OPERAND_58]], %[[OPERAND_59]]
+// CHECK:         %[[INDEX_60:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_60:.*]] = dxsa.operand %[[INDEX_60]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_61:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_61:.*]] = dxsa.operand %[[INDEX_61]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_60]], %[[OPERAND_61]]
 // CHECK:         dxsa.utof r<0, <x, w>>, r<0, <x, x, x, w>>
 // CHECK:         dxsa.add r<13, <x, y, z>>, r<0, <x, x, x, x>>, r<13, <x, y, z, x>>
 // CHECK:         dxsa.add r<1>, r<0, <w, w, w, w>>, r<13>
 // CHECK:         dxsa.utof r<0, <x>>, r<14, <x>>
-// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_6]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 15 : i32}
-// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_6]], %[[OPERAND_7]]
+// CHECK:         %[[INDEX_62:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_62:.*]] = dxsa.operand %[[INDEX_62]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_63:.*]] = dxsa.index.imm {imm = 15 : i32}
+// CHECK:         %[[OPERAND_63:.*]] = dxsa.operand %[[INDEX_63]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_62]], %[[OPERAND_63]]
 // CHECK:         dxsa.utof r<0, <w>>, r<0, <w>>
 // CHECK:         dxsa.add r<1>, r<0, <x, x, x, x>>, r<1>
 // CHECK:         dxsa.add r<1>, r<0, <w, w, w, w>>, r<1>
@@ -77,74 +189,74 @@
 // CHECK:         dxsa.add r<1, <x, y, z>>, r<3, <x, y, z, x>>, r<1, <x, y, z, x>>
 // CHECK:         dxsa.add r<1>, r<4>, r<1>
 // CHECK:         dxsa.utof r<0, <x>>, r<5, <x>>
-// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_8]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 6 : i32}
-// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_9]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_8]], %[[OPERAND_9]]
+// CHECK:         %[[INDEX_64:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_64:.*]] = dxsa.operand %[[INDEX_64]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_65:.*]] = dxsa.index.imm {imm = 6 : i32}
+// CHECK:         %[[OPERAND_65:.*]] = dxsa.operand %[[INDEX_65]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_64]], %[[OPERAND_65]]
 // CHECK:         dxsa.utof r<0, <z>>, r<0, <z>>
 // CHECK:         dxsa.add r<1>, r<0, <x, x, x, x>>, r<1>
 // CHECK:         dxsa.add r<1>, r<0, <z, z, z, z>>, r<1>
 // CHECK:         dxsa.utof r<0, <x>>, r<7, <x>>
-// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_10]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 8 : i32}
-// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_10]], %[[OPERAND_11]]
+// CHECK:         %[[INDEX_66:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_66:.*]] = dxsa.operand %[[INDEX_66]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_67:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_67:.*]] = dxsa.operand %[[INDEX_67]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_66]], %[[OPERAND_67]]
 // CHECK:         dxsa.utof r<0, <z>>, r<0, <z>>
 // CHECK:         dxsa.add r<1, <x, y>>, r<0, <x, x, x, x>>, r<1, <x, y, x, x>>
 // CHECK:         dxsa.add r<1>, r<0, <z, z, z, z>>, r<1>
 // CHECK:         dxsa.utof r<0, <x>>, r<9, <x>>
-// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_12]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 10 : i32}
-// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_13]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_12]], %[[OPERAND_13]]
+// CHECK:         %[[INDEX_68:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_68:.*]] = dxsa.operand %[[INDEX_68]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_69:.*]] = dxsa.index.imm {imm = 10 : i32}
+// CHECK:         %[[OPERAND_69:.*]] = dxsa.operand %[[INDEX_69]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_68]], %[[OPERAND_69]]
 // CHECK:         dxsa.utof r<0, <z>>, r<0, <z>>
 // CHECK:         dxsa.add r<1, <x, y, z>>, r<0, <x, x, x, x>>, r<1, <x, y, z, x>>
 // CHECK:         dxsa.add r<1>, r<0, <z, z, z, z>>, r<1>
 // CHECK:         dxsa.utof r<0, <x>>, r<11, <x>>
-// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_14]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 12 : i32}
-// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_15]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_14]], %[[OPERAND_15]]
+// CHECK:         %[[INDEX_70:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_70:.*]] = dxsa.operand %[[INDEX_70]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_71:.*]] = dxsa.index.imm {imm = 12 : i32}
+// CHECK:         %[[OPERAND_71:.*]] = dxsa.operand %[[INDEX_71]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_70]], %[[OPERAND_71]]
 // CHECK:         dxsa.utof r<0, <z>>, r<0, <z>>
 // CHECK:         dxsa.add r<1>, r<0, <x, x, x, x>>, r<1>
 // CHECK:         dxsa.add r<1>, r<0, <z, z, z, z>>, r<1>
 // CHECK:         dxsa.ftou r<0, <x, z, w>>, r<1, <w, w, w, z>>
-// CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_16]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_17:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_17]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_18:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand %[[INDEX_18]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_16]], %[[OPERAND_17]], %[[OPERAND_18]]
+// CHECK:         %[[INDEX_72:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_72:.*]] = dxsa.operand %[[INDEX_72]] {mask = 16 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_73:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_73:.*]] = dxsa.operand %[[INDEX_73]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_74:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_74:.*]] = dxsa.operand %[[INDEX_74]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_72]], %[[OPERAND_73]], %[[OPERAND_74]]
 // CHECK:         dxsa.add r<2, <x, y, z>>, v<0, <y, y, y, y>>, l(0x3F800000, 0x40000000, 0x40400000, 0x0)
 // CHECK:         dxsa.ftou r<2, <x, y, z>>, r<2, <x, y, z, x>>
-// CHECK:         %[[INDEX_19:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_19]] {mask = 48 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_20:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_20]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_21:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_21:.*]] = dxsa.operand %[[INDEX_21]] {num_components = 4 : i32, swizzle = dense<[2, 3, 2, 2]> : vector<4xi32>, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_19]], %[[OPERAND_20]], %[[OPERAND_21]]
+// CHECK:         %[[INDEX_75:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_75:.*]] = dxsa.operand %[[INDEX_75]] {mask = 48 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_76:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_76:.*]] = dxsa.operand %[[INDEX_76]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_77:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_77:.*]] = dxsa.operand %[[INDEX_77]] {num_components = 4 : i32, swizzle = dense<[2, 3, 2, 2]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_75]], %[[OPERAND_76]], %[[OPERAND_77]]
 // CHECK:         dxsa.ftou r<0, <x, y, z>>, r<1, <w, z, y, w>>
-// CHECK:         %[[INDEX_22:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_22:.*]] = dxsa.operand %[[INDEX_22]] {mask = 112 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_23:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_23:.*]] = dxsa.operand %[[INDEX_23]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_24:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_24:.*]] = dxsa.operand %[[INDEX_24]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 0]> : vector<4xi32>, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_22]], %[[OPERAND_23]], %[[OPERAND_24]]
+// CHECK:         %[[INDEX_78:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_78:.*]] = dxsa.operand %[[INDEX_78]] {mask = 112 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_79:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_79:.*]] = dxsa.operand %[[INDEX_79]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_80:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_80:.*]] = dxsa.operand %[[INDEX_80]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 0]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_78]], %[[OPERAND_79]], %[[OPERAND_80]]
 // CHECK:         dxsa.ftou r<0>, r<1, <w, z, y, x>>
 // CHECK:         dxsa.mov o<0>, r<1>
-// CHECK:         %[[INDEX_25:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_25:.*]] = dxsa.operand %[[INDEX_25]] {mask = 240 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_26:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_26:.*]] = dxsa.operand %[[INDEX_26]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_27:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_27:.*]] = dxsa.operand %[[INDEX_27]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_25]], %[[OPERAND_26]], %[[OPERAND_27]]
+// CHECK:         %[[INDEX_81:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_81:.*]] = dxsa.operand %[[INDEX_81]] {mask = 240 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_82:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_82:.*]] = dxsa.operand %[[INDEX_82]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_83:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_83:.*]] = dxsa.operand %[[INDEX_83]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_81]], %[[OPERAND_82]], %[[OPERAND_83]]
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/sample1.test b/mlir/test/Target/DXSA/hlsl/sample1.test
index 0e443df23cac..d7f19bbbeff5 100644
--- a/mlir/test/Target/DXSA/hlsl/sample1.test
+++ b/mlir/test/Target/DXSA/hlsl/sample1.test
@@ -9,7 +9,7 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0, <x, y>>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 1
-// CHECK:         dxsa.unknown <tokens = [0x8B000045, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005]>
+// CHECK:         dxsa.sample r<0>, v<0, <x, y, x, x>>, t<3, vector>, s<5>
 // CHECK:         dxsa.add o<0>, r<0>, cb<[0, 2], vector>
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/sample2.test b/mlir/test/Target/DXSA/hlsl/sample2.test
index ef85bb87c782..a17055cd0fbd 100644
--- a/mlir/test/Target/DXSA/hlsl/sample2.test
+++ b/mlir/test/Target/DXSA/hlsl/sample2.test
@@ -9,7 +9,7 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0, <x, y>>
 // CHECK:         dxsa.dcl_output o<0, <x, y>>
 // CHECK:         dxsa.dcl_temps 1
-// CHECK:         dxsa.unknown <tokens = [0x8B000045, 0x800000C2, 0x00155543, 0x00100032, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005]>
+// CHECK:         dxsa.sample r<0, <x, y>>, v<0, <x, y, x, x>>, t<3, vector>, s<5>
 // CHECK:         dxsa.add o<0, <x, y>>, r<0, <x, y, x, x>>, cb<[0, 2], vector, <x, y, x, x>>
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/sample3.test b/mlir/test/Target/DXSA/hlsl/sample3.test
index 8a14dc3a7548..c52c54f3312e 100644
--- a/mlir/test/Target/DXSA/hlsl/sample3.test
+++ b/mlir/test/Target/DXSA/hlsl/sample3.test
@@ -8,12 +8,12 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0, <x, y>>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 3
-// CHECK:         dxsa.unknown <tokens = [0x8B000045, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005]>
-// CHECK:         dxsa.unknown <tokens = [0x8C000045, 0x8000F601, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005]>
+// CHECK:         dxsa.sample r<0>, v<0, <x, y, x, x>>, t<3, vector>, s<5>
+// CHECK:         dxsa.sample r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, <u = -5, v = 7, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000E6, 0x80003801, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x0000D000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x00004001, 0x3F000000]>
+// CHECK:         dxsa.sample_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, <l(0x3F000000), null>, <u = -4, v = 1, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x900000E6, 0x80005A01, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x00004001, 0x00000000]>
+// CHECK:         dxsa.sample_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, <l(0x0), r<2, <x>>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
@@ -22,7 +22,7 @@
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1, <x, x, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x900000E6, 0x80005A01, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010100A, 0x00000000]>
+// CHECK:         dxsa.sample_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, <v<0, <x>>, r<2, <x>>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
diff --git a/mlir/test/Target/DXSA/hlsl/sample_b1.test b/mlir/test/Target/DXSA/hlsl/sample_b1.test
index f9d985eb1cc0..9366322eb831 100644
--- a/mlir/test/Target/DXSA/hlsl/sample_b1.test
+++ b/mlir/test/Target/DXSA/hlsl/sample_b1.test
@@ -8,12 +8,12 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0, <x, y>>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 3
-// CHECK:         dxsa.unknown <tokens = [0x8D00004A, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010101A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8E00004A, 0x8000F601, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.sample_b r<0>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y>>
+// CHECK:         dxsa.sample_b r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y>>, <u = -5, v = 7, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x910000E7, 0x80003801, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x0000D000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010101A, 0x00000000, 0x00004001, 0x3F000000]>
+// CHECK:         dxsa.sample_b_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y>>, <l(0x3F000000), null>, <u = -4, v = 1, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x920000E7, 0x80005A01, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010101A, 0x00000000, 0x00004001, 0x00000000]>
+// CHECK:         dxsa.sample_b_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y>>, <l(0x0), r<2, <x>>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
@@ -22,7 +22,7 @@
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1, <x, x, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x920000E7, 0x80005A01, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010101A, 0x00000000, 0x0010100A, 0x00000000]>
+// CHECK:         dxsa.sample_b_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y>>, <v<0, <x>>, r<2, <x>>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
diff --git a/mlir/test/Target/DXSA/hlsl/sample_cmp1.test b/mlir/test/Target/DXSA/hlsl/sample_cmp1.test
index 14772deb771e..91999c0a6b3e 100644
--- a/mlir/test/Target/DXSA/hlsl/sample_cmp1.test
+++ b/mlir/test/Target/DXSA/hlsl/sample_cmp1.test
@@ -11,13 +11,13 @@
 // CHECK:         dxsa.add r<0, <x>>, v<0, <x>>, v<0, <y>>
 // CHECK:         dxsa.ftou r<0, <x>>, r<0, <x>>
 // CHECK:         dxsa.utof r<0, <x>>, r<0, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x8D000046, 0x800000C2, 0x00155543, 0x00100022, 0x00000000, 0x00101046, 0x00000000, 0x00107006, 0x00000003, 0x00106000, 0x00000005, 0x0010000A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8E000046, 0x8000F601, 0x800000C2, 0x00155543, 0x00100042, 0x00000000, 0x00101046, 0x00000000, 0x00107006, 0x00000003, 0x00106000, 0x00000005, 0x0010000A, 0x00000000]>
+// CHECK:         dxsa.sample_c r<0, <y>>, v<0, <x, y, x, x>>, t<3, vector, <x, x, x, x>>, s<5>, r<0, <x>>
+// CHECK:         dxsa.sample_c r<0, <z>>, v<0, <x, y, x, x>>, t<3, vector, <x, x, x, x>>, s<5>, r<0, <x>>, <u = -5, v = 7, w = 0>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
-// CHECK:         dxsa.unknown <tokens = [0x910000E9, 0x80003801, 0x800000C2, 0x00155543, 0x00100012, 0x00000001, 0x0000D000, 0x00101046, 0x00000000, 0x00107006, 0x00000003, 0x00106000, 0x00000005, 0x0010000A, 0x00000000, 0x00004001, 0x3F000000]>
+// CHECK:         dxsa.sample_c_cl_s r<1, <x>>, v<0, <x, y, x, x>>, t<3, vector, <x, x, x, x>>, s<5>, r<0, <x>>, <l(0x3F000000), null>, <u = -4, v = 1, w = 0>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <y>>, r<1, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x920000E9, 0x80005A01, 0x800000C2, 0x00155543, 0x00100012, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107006, 0x00000003, 0x00106000, 0x00000005, 0x0010000A, 0x00000000, 0x00004001, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x920000E9, 0x80005A01, 0x800000C2, 0x00155543, 0x00100012, 0x00000000, 0x00100012, 0x00000003, 0x00101046, 0x00000000, 0x00107006, 0x00000003, 0x00106000, 0x00000005, 0x0010000A, 0x00000000, 0x0010100A, 0x00000000]>
+// CHECK:         dxsa.sample_c_cl_s r<1, <x>>, v<0, <x, y, x, x>>, t<3, vector, <x, x, x, x>>, s<5>, r<0, <x>>, <l(0x0), r<2, <x>>>, <u = -3, v = 2, w = 0>
+// CHECK:         dxsa.sample_c_cl_s r<0, <x>>, v<0, <x, y, x, x>>, t<3, vector, <x, x, x, x>>, s<5>, r<0, <x>>, <v<0, <x>>, r<3, <x>>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <y>>, r<1, <x>>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
 // CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
diff --git a/mlir/test/Target/DXSA/hlsl/sample_cmp2.test b/mlir/test/Target/DXSA/hlsl/sample_cmp2.test
index 33ffbfe3aee2..8927dfa8122b 100644
--- a/mlir/test/Target/DXSA/hlsl/sample_cmp2.test
+++ b/mlir/test/Target/DXSA/hlsl/sample_cmp2.test
@@ -11,10 +11,10 @@
 // CHECK:         dxsa.add r<0, <x>>, v<0, <x>>, v<0, <y>>
 // CHECK:         dxsa.ftou r<0, <x>>, r<0, <x>>
 // CHECK:         dxsa.utof r<0, <x>>, r<0, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x8D000047, 0x800000C2, 0x00155543, 0x00100022, 0x00000000, 0x00101046, 0x00000000, 0x00107006, 0x00000003, 0x00106000, 0x00000005, 0x0010000A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8E000047, 0x8000F601, 0x800000C2, 0x00155543, 0x00100042, 0x00000000, 0x00101046, 0x00000000, 0x00107006, 0x00000003, 0x00106000, 0x00000005, 0x0010000A, 0x00000000]>
+// CHECK:         dxsa.sample_c_lz r<0, <y>>, v<0, <x, y, x, x>>, t<3, vector, <x, x, x, x>>, s<5>, r<0, <x>>
+// CHECK:         dxsa.sample_c_lz r<0, <z>>, v<0, <x, y, x, x>>, t<3, vector, <x, x, x, x>>, s<5>, r<0, <x>>, <u = -5, v = 7, w = 0>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
-// CHECK:         dxsa.unknown <tokens = [0x8E000047, 0x80003801, 0x800000C2, 0x00155543, 0x00100042, 0x00000000, 0x00101046, 0x00000000, 0x00107006, 0x00000003, 0x00106000, 0x00000005, 0x0010000A, 0x00000000]>
+// CHECK:         dxsa.sample_c_lz r<0, <z>>, v<0, <x, y, x, x>>, t<3, vector, <x, x, x, x>>, s<5>, r<0, <x>>, <u = -4, v = 1, w = 0>
 // CHECK:         dxsa.unknown <tokens = [0x900000E5, 0x80005A01, 0x800000C2, 0x00155543, 0x00100012, 0x00000000, 0x00100012, 0x00000001, 0x00101046, 0x00000000, 0x00107006, 0x00000003, 0x00106000, 0x00000005, 0x0010000A, 0x00000000]>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <z>>, r<0, <y>>
 // CHECK:         dxsa.add r<0, <y>>, r<0, <x>>, r<0, <y>>
diff --git a/mlir/test/Target/DXSA/hlsl/sample_grad1.test b/mlir/test/Target/DXSA/hlsl/sample_grad1.test
index 7a67052cfe0f..780a3f2c9b15 100644
--- a/mlir/test/Target/DXSA/hlsl/sample_grad1.test
+++ b/mlir/test/Target/DXSA/hlsl/sample_grad1.test
@@ -8,12 +8,12 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0, <x, y>>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 3
-// CHECK:         dxsa.unknown <tokens = [0x8F000049, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x00101556, 0x00000000, 0x00101516, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x90000049, 0x8000F601, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x00101556, 0x00000000, 0x00101516, 0x00000000]>
+// CHECK:         dxsa.sample_d r<0>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y, y, y, y>>, v<0, <y, x, y, y>>
+// CHECK:         dxsa.sample_d r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y, y, y, y>>, v<0, <y, x, y, y>>, <u = -5, v = 7, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x930000E8, 0x80003801, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x0000D000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x00101556, 0x00000000, 0x00101516, 0x00000000, 0x00004001, 0x3F000000]>
+// CHECK:         dxsa.sample_d_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y, y, y, y>>, v<0, <y, x, y, y>>, <l(0x3F000000), null>, <u = -4, v = 1, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x940000E8, 0x80005A01, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x00101556, 0x00000000, 0x00101516, 0x00000000, 0x00004001, 0x00000000]>
+// CHECK:         dxsa.sample_d_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y, y, y, y>>, v<0, <y, x, y, y>>, <l(0x0), r<2, <x>>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
@@ -22,7 +22,7 @@
 // CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1, <x, x, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x940000E8, 0x80005A01, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x00101556, 0x00000000, 0x00101516, 0x00000000, 0x0010100A, 0x00000000]>
+// CHECK:         dxsa.sample_d_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y, y, y, y>>, v<0, <y, x, y, y>>, <v<0, <x>>, r<2, <x>>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 1 : i32}
 // CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
diff --git a/mlir/test/Target/DXSA/hlsl/sample_l1.test b/mlir/test/Target/DXSA/hlsl/sample_l1.test
index b6a8e97e5ba2..2b9999136d96 100644
--- a/mlir/test/Target/DXSA/hlsl/sample_l1.test
+++ b/mlir/test/Target/DXSA/hlsl/sample_l1.test
@@ -9,12 +9,12 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 3
-// CHECK:         dxsa.unknown <tokens = [0x8D000048, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010101A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8E000048, 0x8000F601, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.sample_l r<0>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y>>
+// CHECK:         dxsa.sample_l r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y>>, <u = -5, v = 7, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x8E000048, 0x80003801, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.sample_l r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y>>, <u = -4, v = 1, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x900000E4, 0x80005A01, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.sample_l_cl_s r<1>, v<0, <x, y, x, x>>, t<3, vector>, s<5>, v<0, <y>>, r<2, <x>>, <u = -3, v = 2, w = 0>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 2 : i32}
 // CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
@@ -25,9 +25,9 @@
 // CHECK:         dxsa.add r<0>, r<0>, r<2, <x, x, x, x>>
 // CHECK:         dxsa.add r<0>, r<1>, r<0>
 // CHECK:         dxsa.add r<0>, r<2, <x, x, x, x>>, r<0>
-// CHECK:         dxsa.unknown <tokens = [0x8D000048, 0x80000282, 0x00155543, 0x001000F2, 0x00000001, 0x00101E46, 0x00000000, 0x00107E46, 0x00000005, 0x00106000, 0x00000005, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.sample_l r<1>, v<0>, t<5, vector>, s<5>, v<0, <y>>
 // CHECK:         dxsa.mad r<0>, r<1>, l(0x40400000, 0x40400000, 0x40400000, 0x40400000), r<0>
-// CHECK:         dxsa.unknown <tokens = [0x8F0000E4, 0x80000282, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101E46, 0x00000000, 0x00107E46, 0x00000005, 0x00106000, 0x00000005, 0x0010101A, 0x00000000]>
+// CHECK:         dxsa.sample_l_cl_s r<1>, v<0>, t<5, vector>, s<5>, v<0, <y>>, r<2, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
 // CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 2 : i32}
 // CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
diff --git a/mlir/test/Target/DXSA/hlsl/snorm1.test b/mlir/test/Target/DXSA/hlsl/snorm1.test
index 7414b098059a..82fa879cba41 100644
--- a/mlir/test/Target/DXSA/hlsl/snorm1.test
+++ b/mlir/test/Target/DXSA/hlsl/snorm1.test
@@ -9,8 +9,8 @@
 // CHECK:         dxsa.dcl_input_ps  linear v<0, <x, y>>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 2
-// CHECK:         dxsa.unknown <tokens = [0x8B000045, 0x800000C2, 0x00088883, 0x001000F2, 0x00000000, 0x00101046, 0x00000000, 0x00107E46, 0x00000003, 0x00106000, 0x00000005]>
-// CHECK:         dxsa.unknown <tokens = [0x8B000045, 0x800000C2, 0x00044443, 0x00100072, 0x00000001, 0x00101046, 0x00000000, 0x00107E46, 0x00000007, 0x00106000, 0x00000005]>
+// CHECK:         dxsa.sample r<0>, v<0, <x, y, x, x>>, t<3, vector>, s<5>
+// CHECK:         dxsa.sample r<1, <x, y, z>>, v<0, <x, y, x, x>>, t<7, vector>, s<5>
 // CHECK:         dxsa.add o<0>, r<0>, r<1, <z, z, y, x>>
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/srv_ms_load1.test b/mlir/test/Target/DXSA/hlsl/srv_ms_load1.test
index f18fc3cf908e..e89c4cdb9042 100644
--- a/mlir/test/Target/DXSA/hlsl/srv_ms_load1.test
+++ b/mlir/test/Target/DXSA/hlsl/srv_ms_load1.test
@@ -11,30 +11,80 @@
 // CHECK:         dxsa.dcl_temps 4
 // CHECK:         dxsa.mov r<0, <x, y>>, v<1, <x, y, x, x>>
 // CHECK:         dxsa.mov r<0, <z, w>>, l(0x0, 0x0, 0x0, 0x0)
-// CHECK:         dxsa.unknown <tokens = [0x8B00002E, 0x80000102, 0x00155543, 0x00100072, 0x00000000, 0x00100E46, 0x00000000, 0x00107E46, 0x00000003, 0x00004001, 0x00000000]>
+// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         dxsa.instruction "ldms" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]], %[[OPERAND_3]]
 // CHECK:         dxsa.mov r<1, <x, y>>, v<0, <x, y, x, x>>
 // CHECK:         dxsa.mov r<1, <z, w>>, l(0x0, 0x0, 0x0, 0x0)
-// CHECK:         dxsa.unknown <tokens = [0x8B00002E, 0x80000102, 0x00155543, 0x00100072, 0x00000002, 0x00100F46, 0x00000001, 0x00107E46, 0x00000003, 0x0010102A, 0x00000000]>
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_3]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, swizzle = dense<[0, 1, 3, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, one = 2 : i32, type = 1 : i32}
+// CHECK:         dxsa.instruction "ldms" %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]], %[[OPERAND_7]]
 // CHECK:         dxsa.add r<0, <x, y, z>>, r<0, <x, y, z, x>>, r<2, <x, y, z, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8C00002E, 0x8000F601, 0x80000102, 0x00155543, 0x00100072, 0x00000002, 0x00100F46, 0x00000001, 0x00107E46, 0x00000003, 0x0010102A, 0x00000000]>
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_7]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, swizzle = dense<[0, 1, 3, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_9]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 2 : i32, type = 1 : i32}
+// CHECK:         dxsa.instruction "ldms" %[[OPERAND_8]], %[[OPERAND_9]], %[[OPERAND_10]], %[[OPERAND_11]]
 // CHECK:         dxsa.add r<0, <x, y, z>>, r<0, <x, y, z, x>>, r<2, <x, y, z, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8E0000E0, 0x8000F601, 0x80000102, 0x00155543, 0x00100072, 0x00000002, 0x00100012, 0x00000003, 0x00100F46, 0x00000001, 0x00107E46, 0x00000003, 0x0010102A, 0x00000000]>
+// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_11]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_12]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_13]] {num_components = 4 : i32, swizzle = dense<[0, 1, 3, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_15]] {num_components = 4 : i32, one = 2 : i32, type = 1 : i32}
+// CHECK:         dxsa.instruction "ldms_s" %[[OPERAND_12]], %[[OPERAND_13]], %[[OPERAND_14]], %[[OPERAND_15]], %[[OPERAND_16]]
 // CHECK:         dxsa.add r<0, <x, y, z>>, r<0, <x, y, z, x>>, r<2, <x, y, z, x>>
-// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 3 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
+// CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_16]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_17:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand %[[INDEX_17]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_17]], %[[OPERAND_18]]
 // CHECK:         dxsa.utof r<0, <w>>, r<0, <w>>
 // CHECK:         dxsa.add r<0, <x, y, z>>, r<0, <w, w, w, w>>, r<0, <x, y, z, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E0, 0x80000102, 0x00155543, 0x00100072, 0x00000002, 0x00100012, 0x00000003, 0x00100F46, 0x00000001, 0x00107E46, 0x00000003, 0x0010102A, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8B00002E, 0x80000102, 0x00155543, 0x00100072, 0x00000001, 0x00100E46, 0x00000001, 0x00107E46, 0x00000003, 0x00004001, 0x0000000D]>
+// CHECK:         %[[INDEX_18:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_18]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_19:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_19]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_20:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_21:.*]] = dxsa.operand %[[INDEX_20]] {num_components = 4 : i32, swizzle = dense<[0, 1, 3, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_21:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_22:.*]] = dxsa.operand %[[INDEX_21]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         %[[INDEX_22:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_23:.*]] = dxsa.operand %[[INDEX_22]] {num_components = 4 : i32, one = 2 : i32, type = 1 : i32}
+// CHECK:         dxsa.instruction "ldms_s" %[[OPERAND_19]], %[[OPERAND_20]], %[[OPERAND_21]], %[[OPERAND_22]], %[[OPERAND_23]]
+// CHECK:         %[[INDEX_23:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_24:.*]] = dxsa.operand %[[INDEX_23]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_24:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_25:.*]] = dxsa.operand %[[INDEX_24]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_25:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_26:.*]] = dxsa.operand %[[INDEX_25]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         %[[OPERAND_27:.*]] = dxsa.operand.imm {imm = dense<13> : vector<1xi32>}
+// CHECK:         dxsa.instruction "ldms" %[[OPERAND_24]], %[[OPERAND_25]], %[[OPERAND_26]], %[[OPERAND_27]]
 // CHECK:         dxsa.add r<0, <x, y, z>>, r<0, <x, y, z, x>>, r<2, <x, y, z, x>>
-// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 3 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_2]], %[[OPERAND_3]]
+// CHECK:         %[[INDEX_26:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_28:.*]] = dxsa.operand %[[INDEX_26]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_27:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_29:.*]] = dxsa.operand %[[INDEX_27]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_28]], %[[OPERAND_29]]
 // CHECK:         dxsa.utof r<0, <w>>, r<0, <w>>
 // CHECK:         dxsa.add r<0, <x, y, z>>, r<0, <w, w, w, w>>, r<0, <x, y, z, x>>
 // CHECK:         dxsa.add o<0, <x, y, z>>, r<1, <x, y, z, x>>, r<0, <x, y, z, x>>
diff --git a/mlir/test/Target/DXSA/hlsl/srv_typed_load1.test b/mlir/test/Target/DXSA/hlsl/srv_typed_load1.test
index 3cae33036bcf..e80ec11e3164 100644
--- a/mlir/test/Target/DXSA/hlsl/srv_typed_load1.test
+++ b/mlir/test/Target/DXSA/hlsl/srv_typed_load1.test
@@ -10,28 +10,62 @@
 // CHECK:         dxsa.dcl_temps 5
 // CHECK:         dxsa.ftou r<0, <x, y>>, v<1, <x, y, x, x>>
 // CHECK:         dxsa.mov r<0, <z, w>>, l(0x0, 0x0, 0x0, 0x0)
-// CHECK:         dxsa.unknown <tokens = [0x8900002D, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00100E46, 0x00000000, 0x00107E46, 0x00000003]>
+// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
 // CHECK:         dxsa.ftoi r<1>, v<0, <x, y, z, z>>
-// CHECK:         dxsa.unknown <tokens = [0x8900002D, 0x800000C2, 0x00155543, 0x001000F2, 0x00000002, 0x00100F46, 0x00000001, 0x00107E46, 0x00000003]>
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, swizzle = dense<[0, 1, 3, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]]
 // CHECK:         dxsa.add r<0>, r<0>, r<2>
-// CHECK:         dxsa.unknown <tokens = [0x8A00002D, 0x8000F601, 0x800000C2, 0x00155543, 0x001000F2, 0x00000002, 0x00100F46, 0x00000001, 0x00107E46, 0x00000003]>
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_6]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, swizzle = dense<[0, 1, 3, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld" %[[OPERAND_6]], %[[OPERAND_7]], %[[OPERAND_8]]
 // CHECK:         dxsa.add r<0>, r<0>, r<2>
-// CHECK:         dxsa.unknown <tokens = [0x8C0000DF, 0x8000F601, 0x800000C2, 0x00155543, 0x001000F2, 0x00000002, 0x00100012, 0x00000003, 0x00100F46, 0x00000001, 0x00107E46, 0x00000003]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000DF, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000004, 0x00100E46, 0x00000001, 0x00107E46, 0x00000003]>
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_9]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_10]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, swizzle = dense<[0, 1, 3, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_12]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_s" %[[OPERAND_9]], %[[OPERAND_10]], %[[OPERAND_11]], %[[OPERAND_12]]
+// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_13]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_14]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_15]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_16]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_s" %[[OPERAND_13]], %[[OPERAND_14]], %[[OPERAND_15]], %[[OPERAND_16]]
 // CHECK:         dxsa.add r<0>, r<0>, r<2>
-// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 3 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
+// CHECK:         %[[INDEX_17:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_17]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_18:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand %[[INDEX_18]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_17]], %[[OPERAND_18]]
 // CHECK:         dxsa.utof r<2, <x>>, r<2, <x>>
 // CHECK:         dxsa.add r<0>, r<0>, r<2, <x, x, x, x>>
 // CHECK:         dxsa.add r<0>, r<1>, r<0>
-// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 4 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_2]], %[[OPERAND_3]]
+// CHECK:         %[[INDEX_19:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_19]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_20:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_20]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_19]], %[[OPERAND_20]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.add o<0>, r<0>, r<1, <x, x, x, x>>
 // CHECK:         dxsa.ret
diff --git a/mlir/test/Target/DXSA/hlsl/srv_typed_load2.test b/mlir/test/Target/DXSA/hlsl/srv_typed_load2.test
index 6ec1a6141a7c..b607d46b62c7 100644
--- a/mlir/test/Target/DXSA/hlsl/srv_typed_load2.test
+++ b/mlir/test/Target/DXSA/hlsl/srv_typed_load2.test
@@ -7,14 +7,28 @@
 // CHECK:         dxsa.dcl_input_ps  constant v<0, <x>>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 3
-// CHECK:         dxsa.unknown <tokens = [0x8900002D, 0x80000042, 0x00155543, 0x001000F2, 0x00000000, 0x00101006, 0x00000000, 0x00107E46, 0x00000003]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000DF, 0x80000042, 0x00155543, 0x001000F2, 0x00000001, 0x00100012, 0x00000002, 0x00101006, 0x00000000, 0x00107E46, 0x00000003]>
+// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_s" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]]
 // CHECK:         dxsa.mad r<0>, r<0>, l(0x40000000, 0x40000000, 0x40000000, 0x40000000), r<1>
-// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_7]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_7]], %[[OPERAND_8]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.add o<0>, r<0>, r<1, <x, x, x, x>>
 // CHECK:         dxsa.ret
diff --git a/mlir/test/Target/DXSA/hlsl/struct_buf1.test b/mlir/test/Target/DXSA/hlsl/struct_buf1.test
index 1b9096875cfd..4cc40bd7e58e 100644
--- a/mlir/test/Target/DXSA/hlsl/struct_buf1.test
+++ b/mlir/test/Target/DXSA/hlsl/struct_buf1.test
@@ -11,82 +11,249 @@
 // CHECK:         dxsa.dcl_temps 22
 // CHECK:         dxsa.add r<0, <x, y>>, v<0, <x, y, x, x>>, l(0x43480000, 0x43480000, 0x0, 0x0)
 // CHECK:         dxsa.ftoi r<0, <x, y>>, r<0, <x, y, x, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x001000C2, 0x00000000, 0x0010000A, 0x00000000, 0x00004001, 0x00000000, 0x0011E406, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x00100032, 0x00000001, 0x0010000A, 0x00000000, 0x00004001, 0x00000008, 0x0011E046, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x00100042, 0x00000001, 0x0010000A, 0x00000000, 0x00004001, 0x00000010, 0x0011E006, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x00100072, 0x00000002, 0x0010000A, 0x00000000, 0x00004001, 0x00000014, 0x0011E246, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x001000F2, 0x00000003, 0x0010000A, 0x00000000, 0x00004001, 0x00000020, 0x0011EE46, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x00100022, 0x00000004, 0x0010000A, 0x00000000, 0x00004001, 0x00000030, 0x0011E006, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x00100032, 0x00000005, 0x00100012, 0x00000000, 0x0010001A, 0x00000000, 0x00004001, 0x00000000, 0x0011EE46, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x001000C2, 0x00000004, 0x00100012, 0x00000006, 0x0010001A, 0x00000000, 0x00004001, 0x00000000, 0x0011EE46, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x00100012, 0x00000007, 0x00100012, 0x00000008, 0x0010001A, 0x00000000, 0x00004001, 0x00000010, 0x0011EE46, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x001000E2, 0x00000006, 0x00100012, 0x00000009, 0x0010001A, 0x00000000, 0x00004001, 0x00000010, 0x0011EE46, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x001000F2, 0x0000000A, 0x00100012, 0x0000000B, 0x0010001A, 0x00000000, 0x00004001, 0x00000020, 0x0011EE46, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x00100012, 0x0000000C, 0x00100012, 0x0000000D, 0x0010001A, 0x00000000, 0x00004001, 0x00000030, 0x0011E006, 0x00000001]>
+// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 192 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<[0, 0, 0, 1]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]], %[[OPERAND_3]]
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_3]] {mask = 48 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<[0, 1, 0, 0]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]], %[[OPERAND_7]]
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_6]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand.imm {imm = dense<16> : vector<1xi32>}
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_8]], %[[OPERAND_9]], %[[OPERAND_10]], %[[OPERAND_11]]
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_9]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand.imm {imm = dense<20> : vector<1xi32>}
+// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 0]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_12]], %[[OPERAND_13]], %[[OPERAND_14]], %[[OPERAND_15]]
+// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_12]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_13]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand.imm {imm = dense<32> : vector<1xi32>}
+// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_16]], %[[OPERAND_17]], %[[OPERAND_18]], %[[OPERAND_19]]
+// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_15]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_21:.*]] = dxsa.operand %[[INDEX_16]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_22:.*]] = dxsa.operand.imm {imm = dense<48> : vector<1xi32>}
+// CHECK:         %[[INDEX_17:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_23:.*]] = dxsa.operand %[[INDEX_17]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_20]], %[[OPERAND_21]], %[[OPERAND_22]], %[[OPERAND_23]]
+// CHECK:         %[[INDEX_18:.*]] = dxsa.index.imm {imm = 5 : i32}
+// CHECK:         %[[OPERAND_24:.*]] = dxsa.operand %[[INDEX_18]] {mask = 48 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_19:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_25:.*]] = dxsa.operand %[[INDEX_19]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_20:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_26:.*]] = dxsa.operand %[[INDEX_20]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_27:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_21:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_28:.*]] = dxsa.operand %[[INDEX_21]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_24]], %[[OPERAND_25]], %[[OPERAND_26]], %[[OPERAND_27]], %[[OPERAND_28]]
+// CHECK:         %[[INDEX_22:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_29:.*]] = dxsa.operand %[[INDEX_22]] {mask = 192 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_23:.*]] = dxsa.index.imm {imm = 6 : i32}
+// CHECK:         %[[OPERAND_30:.*]] = dxsa.operand %[[INDEX_23]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_24:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_31:.*]] = dxsa.operand %[[INDEX_24]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_32:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_25:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_33:.*]] = dxsa.operand %[[INDEX_25]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_29]], %[[OPERAND_30]], %[[OPERAND_31]], %[[OPERAND_32]], %[[OPERAND_33]]
+// CHECK:         %[[INDEX_26:.*]] = dxsa.index.imm {imm = 7 : i32}
+// CHECK:         %[[OPERAND_34:.*]] = dxsa.operand %[[INDEX_26]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_27:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_35:.*]] = dxsa.operand %[[INDEX_27]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_28:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_36:.*]] = dxsa.operand %[[INDEX_28]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_37:.*]] = dxsa.operand.imm {imm = dense<16> : vector<1xi32>}
+// CHECK:         %[[INDEX_29:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_38:.*]] = dxsa.operand %[[INDEX_29]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_34]], %[[OPERAND_35]], %[[OPERAND_36]], %[[OPERAND_37]], %[[OPERAND_38]]
+// CHECK:         %[[INDEX_30:.*]] = dxsa.index.imm {imm = 6 : i32}
+// CHECK:         %[[OPERAND_39:.*]] = dxsa.operand %[[INDEX_30]] {mask = 224 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_31:.*]] = dxsa.index.imm {imm = 9 : i32}
+// CHECK:         %[[OPERAND_40:.*]] = dxsa.operand %[[INDEX_31]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_32:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_41:.*]] = dxsa.operand %[[INDEX_32]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_42:.*]] = dxsa.operand.imm {imm = dense<16> : vector<1xi32>}
+// CHECK:         %[[INDEX_33:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_43:.*]] = dxsa.operand %[[INDEX_33]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_39]], %[[OPERAND_40]], %[[OPERAND_41]], %[[OPERAND_42]], %[[OPERAND_43]]
+// CHECK:         %[[INDEX_34:.*]] = dxsa.index.imm {imm = 10 : i32}
+// CHECK:         %[[OPERAND_44:.*]] = dxsa.operand %[[INDEX_34]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_35:.*]] = dxsa.index.imm {imm = 11 : i32}
+// CHECK:         %[[OPERAND_45:.*]] = dxsa.operand %[[INDEX_35]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_36:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_46:.*]] = dxsa.operand %[[INDEX_36]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_47:.*]] = dxsa.operand.imm {imm = dense<32> : vector<1xi32>}
+// CHECK:         %[[INDEX_37:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_48:.*]] = dxsa.operand %[[INDEX_37]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_44]], %[[OPERAND_45]], %[[OPERAND_46]], %[[OPERAND_47]], %[[OPERAND_48]]
+// CHECK:         %[[INDEX_38:.*]] = dxsa.index.imm {imm = 12 : i32}
+// CHECK:         %[[OPERAND_49:.*]] = dxsa.operand %[[INDEX_38]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_39:.*]] = dxsa.index.imm {imm = 13 : i32}
+// CHECK:         %[[OPERAND_50:.*]] = dxsa.operand %[[INDEX_39]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_40:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_51:.*]] = dxsa.operand %[[INDEX_40]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_52:.*]] = dxsa.operand.imm {imm = dense<48> : vector<1xi32>}
+// CHECK:         %[[INDEX_41:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_53:.*]] = dxsa.operand %[[INDEX_41]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_49]], %[[OPERAND_50]], %[[OPERAND_51]], %[[OPERAND_52]], %[[OPERAND_53]]
 // CHECK:         dxsa.mov r<14, <z>>, l(0x0)
 // CHECK:         dxsa.ftou r<1, <w>>, v<0, <y>>
 // CHECK:         dxsa.ineg r<5, <z>>, r<1, <w>>
 // CHECK:         dxsa.ult r<7, <y, z, w>>, r<1, <w, w, w, w>>, l(0x0, 0x1, 0x2, 0x3)
 // CHECK:         dxsa.and r<5, <z>>, r<5, <z>>, r<7, <z>>
 // CHECK:         dxsa.ftoi r<8, <y, z>>, v<0, <x, x, y, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x001000F2, 0x0000000F, 0x0010001A, 0x00000008, 0x00004001, 0x00000020, 0x00107936, 0x00000000]>
+// CHECK:         %[[INDEX_42:.*]] = dxsa.index.imm {imm = 15 : i32}
+// CHECK:         %[[OPERAND_54:.*]] = dxsa.operand %[[INDEX_42]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_43:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_55:.*]] = dxsa.operand %[[INDEX_43]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_56:.*]] = dxsa.operand.imm {imm = dense<32> : vector<1xi32>}
+// CHECK:         %[[INDEX_44:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_57:.*]] = dxsa.operand %[[INDEX_44]] {num_components = 4 : i32, swizzle = dense<[3, 0, 1, 2]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_54]], %[[OPERAND_55]], %[[OPERAND_56]], %[[OPERAND_57]]
 // CHECK:         dxsa.mov r<16, <w>>, r<15, <y>>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x00100072, 0x00000010, 0x0010001A, 0x00000008, 0x00004001, 0x00000014, 0x00107246, 0x00000000]>
+// CHECK:         %[[INDEX_45:.*]] = dxsa.index.imm {imm = 16 : i32}
+// CHECK:         %[[OPERAND_58:.*]] = dxsa.operand %[[INDEX_45]] {mask = 112 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_46:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_59:.*]] = dxsa.operand %[[INDEX_46]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_60:.*]] = dxsa.operand.imm {imm = dense<20> : vector<1xi32>}
+// CHECK:         %[[INDEX_47:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_61:.*]] = dxsa.operand %[[INDEX_47]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 0]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_58]], %[[OPERAND_59]], %[[OPERAND_60]], %[[OPERAND_61]]
 // CHECK:         dxsa.and r<9, <y, z>>, r<5, <z, z, z, z>>, r<16, <z, z, w, z>>
 // CHECK:         dxsa.and r<11, <y, z>>, r<7, <y, y, y, y>>, r<16, <x, x, y, x>>
 // CHECK:         dxsa.or r<9, <y, z>>, r<9, <y, y, z, y>>, r<11, <y, y, z, y>>
 // CHECK:         dxsa.iadd r<5, <w>>, r<1, <w>>, l(0xFFFFFFFD)
 // CHECK:         dxsa.ishl r<1, <w>>, r<1, <w>>, l(0x3)
 // CHECK:         dxsa.iadd r<1, <w>>, r<1, <w>>, l(0x14)
-// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 5 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 7 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
-// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 5 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, one = 3 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "movc" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]], %[[OPERAND_3]]
+// CHECK:         %[[INDEX_48:.*]] = dxsa.index.imm {imm = 5 : i32}
+// CHECK:         %[[OPERAND_62:.*]] = dxsa.operand %[[INDEX_48]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_49:.*]] = dxsa.index.imm {imm = 7 : i32}
+// CHECK:         %[[OPERAND_63:.*]] = dxsa.operand %[[INDEX_49]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_64:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_50:.*]] = dxsa.index.imm {imm = 5 : i32}
+// CHECK:         %[[OPERAND_65:.*]] = dxsa.operand %[[INDEX_50]] {num_components = 4 : i32, one = 3 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "movc" %[[OPERAND_62]], %[[OPERAND_63]], %[[OPERAND_64]], %[[OPERAND_65]]
 // CHECK:         dxsa.and r<11, <y, z>>, r<15, <z, z, w, z>>, r<5, <w, w, w, w>>
 // CHECK:         dxsa.or r<9, <y, z>>, r<9, <y, y, z, y>>, r<11, <y, y, z, y>>
 // CHECK:         dxsa.ieq r<7, <z>>, r<7, <w>>, l(0x0)
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x00100022, 0x0000000F, 0x0010001A, 0x00000008, 0x00004001, 0x00000030, 0x00107006, 0x00000000]>
+// CHECK:         %[[INDEX_51:.*]] = dxsa.index.imm {imm = 15 : i32}
+// CHECK:         %[[OPERAND_66:.*]] = dxsa.operand %[[INDEX_51]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_52:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_67:.*]] = dxsa.operand %[[INDEX_52]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_68:.*]] = dxsa.operand.imm {imm = dense<48> : vector<1xi32>}
+// CHECK:         %[[INDEX_53:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_69:.*]] = dxsa.operand %[[INDEX_53]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_66]], %[[OPERAND_67]], %[[OPERAND_68]], %[[OPERAND_69]]
 // CHECK:         dxsa.and r<11, <y, z>>, r<7, <z, z, z, z>>, r<15, <x, x, y, x>>
 // CHECK:         dxsa.or r<9, <y, z>>, r<9, <y, y, z, y>>, r<11, <y, y, z, y>>
 // CHECK:         dxsa.itof r<9, <y, z>>, r<9, <y, y, z, y>>
 // CHECK:         dxsa.mov r<15, <z>>, l(0x0)
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x00100032, 0x0000000F, 0x0010001A, 0x00000008, 0x00004001, 0x00000000, 0x00107046, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8B0000A7, 0x8001A302, 0x00199983, 0x001000E2, 0x0000000B, 0x0010001A, 0x00000008, 0x00004001, 0x00000008, 0x00107906, 0x00000000]>
+// CHECK:         %[[INDEX_54:.*]] = dxsa.index.imm {imm = 15 : i32}
+// CHECK:         %[[OPERAND_70:.*]] = dxsa.operand %[[INDEX_54]] {mask = 48 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_55:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_71:.*]] = dxsa.operand %[[INDEX_55]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_72:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_56:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_73:.*]] = dxsa.operand %[[INDEX_56]] {num_components = 4 : i32, swizzle = dense<[0, 1, 0, 0]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_70]], %[[OPERAND_71]], %[[OPERAND_72]], %[[OPERAND_73]]
+// CHECK:         %[[INDEX_57:.*]] = dxsa.index.imm {imm = 11 : i32}
+// CHECK:         %[[OPERAND_74:.*]] = dxsa.operand %[[INDEX_57]] {mask = 224 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_58:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_75:.*]] = dxsa.operand %[[INDEX_58]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_76:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
+// CHECK:         %[[INDEX_59:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_77:.*]] = dxsa.operand %[[INDEX_59]] {num_components = 4 : i32, swizzle = dense<[0, 0, 1, 2]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_structured" %[[OPERAND_74]], %[[OPERAND_75]], %[[OPERAND_76]], %[[OPERAND_77]]
 // CHECK:         dxsa.add r<14, <x, y, w>>, r<11, <y, z, y, w>>, r<15, <x, y, x, z>>
 // CHECK:         dxsa.add r<15, <x, w>>, r<9, <z, z, z, y>>, r<14, <y, y, y, z>>
 // CHECK:         dxsa.mov r<15, <y>>, r<14, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x001000F2, 0x00000010, 0x00100012, 0x00000011, 0x0010002A, 0x00000008, 0x00004001, 0x00000000, 0x00107E46, 0x00000000]>
+// CHECK:         %[[INDEX_60:.*]] = dxsa.index.imm {imm = 16 : i32}
+// CHECK:         %[[OPERAND_78:.*]] = dxsa.operand %[[INDEX_60]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_61:.*]] = dxsa.index.imm {imm = 17 : i32}
+// CHECK:         %[[OPERAND_79:.*]] = dxsa.operand %[[INDEX_61]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_62:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_80:.*]] = dxsa.operand %[[INDEX_62]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_81:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_63:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_82:.*]] = dxsa.operand %[[INDEX_63]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_78]], %[[OPERAND_79]], %[[OPERAND_80]], %[[OPERAND_81]], %[[OPERAND_82]]
 // CHECK:         dxsa.add r<14, <x, y>>, r<15, <y, x, y, y>>, r<16, <x, y, x, x>>
-// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 7 : i32}
-// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_3]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 17 : i32}
-// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_4]], %[[OPERAND_5]]
+// CHECK:         %[[INDEX_64:.*]] = dxsa.index.imm {imm = 7 : i32}
+// CHECK:         %[[OPERAND_83:.*]] = dxsa.operand %[[INDEX_64]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_65:.*]] = dxsa.index.imm {imm = 17 : i32}
+// CHECK:         %[[OPERAND_84:.*]] = dxsa.operand %[[INDEX_65]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_83]], %[[OPERAND_84]]
 // CHECK:         dxsa.mov r<16, <x, y>>, r<16, <z, w, z, z>>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x001000F2, 0x00000011, 0x00100012, 0x00000012, 0x0010002A, 0x00000008, 0x00004001, 0x00000010, 0x00107E46, 0x00000000]>
-// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 8 : i32}
-// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_5]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 18 : i32}
-// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_6]], %[[OPERAND_7]]
+// CHECK:         %[[INDEX_66:.*]] = dxsa.index.imm {imm = 17 : i32}
+// CHECK:         %[[OPERAND_85:.*]] = dxsa.operand %[[INDEX_66]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_67:.*]] = dxsa.index.imm {imm = 18 : i32}
+// CHECK:         %[[OPERAND_86:.*]] = dxsa.operand %[[INDEX_67]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_68:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_87:.*]] = dxsa.operand %[[INDEX_68]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_88:.*]] = dxsa.operand.imm {imm = dense<16> : vector<1xi32>}
+// CHECK:         %[[INDEX_69:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_89:.*]] = dxsa.operand %[[INDEX_69]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_85]], %[[OPERAND_86]], %[[OPERAND_87]], %[[OPERAND_88]], %[[OPERAND_89]]
+// CHECK:         %[[INDEX_70:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_90:.*]] = dxsa.operand %[[INDEX_70]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_71:.*]] = dxsa.index.imm {imm = 18 : i32}
+// CHECK:         %[[OPERAND_91:.*]] = dxsa.operand %[[INDEX_71]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_90]], %[[OPERAND_91]]
 // CHECK:         dxsa.and r<7, <w>>, r<7, <w>>, r<8, <y>>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x001000F2, 0x00000012, 0x00100012, 0x00000013, 0x0010002A, 0x00000008, 0x00004001, 0x00000020, 0x00107E46, 0x00000000]>
-// CHECK:         dxsa.unknown <tokens = [0x8D0000E3, 0x8001A302, 0x00199983, 0x00100012, 0x00000014, 0x00100012, 0x00000015, 0x0010002A, 0x00000008, 0x00004001, 0x00000030, 0x00107006, 0x00000000]>
-// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 8 : i32}
-// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_7]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 19 : i32}
-// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_8]], %[[OPERAND_9]]
+// CHECK:         %[[INDEX_72:.*]] = dxsa.index.imm {imm = 18 : i32}
+// CHECK:         %[[OPERAND_92:.*]] = dxsa.operand %[[INDEX_72]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_73:.*]] = dxsa.index.imm {imm = 19 : i32}
+// CHECK:         %[[OPERAND_93:.*]] = dxsa.operand %[[INDEX_73]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_74:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_94:.*]] = dxsa.operand %[[INDEX_74]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_95:.*]] = dxsa.operand.imm {imm = dense<32> : vector<1xi32>}
+// CHECK:         %[[INDEX_75:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_96:.*]] = dxsa.operand %[[INDEX_75]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_92]], %[[OPERAND_93]], %[[OPERAND_94]], %[[OPERAND_95]], %[[OPERAND_96]]
+// CHECK:         %[[INDEX_76:.*]] = dxsa.index.imm {imm = 20 : i32}
+// CHECK:         %[[OPERAND_97:.*]] = dxsa.operand %[[INDEX_76]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_77:.*]] = dxsa.index.imm {imm = 21 : i32}
+// CHECK:         %[[OPERAND_98:.*]] = dxsa.operand %[[INDEX_77]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_78:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_99:.*]] = dxsa.operand %[[INDEX_78]] {num_components = 4 : i32, one = 2 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_100:.*]] = dxsa.operand.imm {imm = dense<48> : vector<1xi32>}
+// CHECK:         %[[INDEX_79:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_101:.*]] = dxsa.operand %[[INDEX_79]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 7 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_97]], %[[OPERAND_98]], %[[OPERAND_99]], %[[OPERAND_100]], %[[OPERAND_101]]
+// CHECK:         %[[INDEX_80:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_102:.*]] = dxsa.operand %[[INDEX_80]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_81:.*]] = dxsa.index.imm {imm = 19 : i32}
+// CHECK:         %[[OPERAND_103:.*]] = dxsa.operand %[[INDEX_81]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_102]], %[[OPERAND_103]]
 // CHECK:         dxsa.and r<7, <w>>, r<7, <w>>, r<8, <y>>
-// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 8 : i32}
-// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_9]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 21 : i32}
-// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_10]], %[[OPERAND_11]]
+// CHECK:         %[[INDEX_82:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_104:.*]] = dxsa.operand %[[INDEX_82]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_83:.*]] = dxsa.index.imm {imm = 21 : i32}
+// CHECK:         %[[OPERAND_105:.*]] = dxsa.operand %[[INDEX_83]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_104]], %[[OPERAND_105]]
 // CHECK:         dxsa.and r<7, <w>>, r<7, <w>>, r<8, <y>>
 // CHECK:         dxsa.utof r<7, <w>>, r<7, <w>>
 // CHECK:         dxsa.add r<8, <y, z, w>>, r<7, <w, w, w, w>>, r<14, <x, x, y, w>>
@@ -126,93 +293,141 @@
 // CHECK:         dxsa.add r<3, <x, w>>, r<0, <w, w, w, z>>, r<14, <y, y, y, w>>
 // CHECK:         dxsa.mov r<3, <y, z>>, r<14, <x, x, z, x>>
 // CHECK:         dxsa.add r<3, <x, y>>, r<5, <x, y, x, x>>, r<3, <y, x, y, y>>
-// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_11]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_12]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_12]], %[[OPERAND_13]]
-// CHECK:         dxsa.unknown <tokens = [0x8C0000E3, 0x8001A302, 0x00199983, 0x0000D000, 0x00100012, 0x00000002, 0x0010001A, 0x00000000, 0x00004001, 0x00000010, 0x0011EE46, 0x00000001]>
-// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_13]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_14]], %[[OPERAND_15]]
+// CHECK:         %[[INDEX_84:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_106:.*]] = dxsa.operand %[[INDEX_84]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_85:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_107:.*]] = dxsa.operand %[[INDEX_85]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_106]], %[[OPERAND_107]]
+// CHECK:         %[[OPERAND_108:.*]] = dxsa.operand  {num_components = 0 : i32, type = 13 : i32}
+// CHECK:         %[[INDEX_86:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_109:.*]] = dxsa.operand %[[INDEX_86]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_87:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_110:.*]] = dxsa.operand %[[INDEX_87]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_111:.*]] = dxsa.operand.imm {imm = dense<16> : vector<1xi32>}
+// CHECK:         %[[INDEX_88:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_112:.*]] = dxsa.operand %[[INDEX_88]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_108]], %[[OPERAND_109]], %[[OPERAND_110]], %[[OPERAND_111]], %[[OPERAND_112]]
+// CHECK:         %[[INDEX_89:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_113:.*]] = dxsa.operand %[[INDEX_89]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_90:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_114:.*]] = dxsa.operand %[[INDEX_90]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_113]], %[[OPERAND_114]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <x>>, r<0, <z>>
-// CHECK:         dxsa.unknown <tokens = [0x8C0000E3, 0x8001A302, 0x00199983, 0x0000D000, 0x00100012, 0x00000002, 0x0010001A, 0x00000000, 0x00004001, 0x00000020, 0x0011EE46, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8C0000E3, 0x8001A302, 0x00199983, 0x0000D000, 0x00100012, 0x00000004, 0x0010001A, 0x00000000, 0x00004001, 0x00000030, 0x0011E006, 0x00000001]>
-// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_15]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 4 : i32}
-// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_16]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_16]], %[[OPERAND_17]]
-// CHECK:         %[[INDEX_17:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand %[[INDEX_17]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_18:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_18]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_18]], %[[OPERAND_19]]
+// CHECK:         %[[OPERAND_115:.*]] = dxsa.operand  {num_components = 0 : i32, type = 13 : i32}
+// CHECK:         %[[INDEX_91:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_116:.*]] = dxsa.operand %[[INDEX_91]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_92:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_117:.*]] = dxsa.operand %[[INDEX_92]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_118:.*]] = dxsa.operand.imm {imm = dense<32> : vector<1xi32>}
+// CHECK:         %[[INDEX_93:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_119:.*]] = dxsa.operand %[[INDEX_93]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_115]], %[[OPERAND_116]], %[[OPERAND_117]], %[[OPERAND_118]], %[[OPERAND_119]]
+// CHECK:         %[[OPERAND_120:.*]] = dxsa.operand  {num_components = 0 : i32, type = 13 : i32}
+// CHECK:         %[[INDEX_94:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_121:.*]] = dxsa.operand %[[INDEX_94]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_95:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_122:.*]] = dxsa.operand %[[INDEX_95]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_123:.*]] = dxsa.operand.imm {imm = dense<48> : vector<1xi32>}
+// CHECK:         %[[INDEX_96:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_124:.*]] = dxsa.operand %[[INDEX_96]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_120]], %[[OPERAND_121]], %[[OPERAND_122]], %[[OPERAND_123]], %[[OPERAND_124]]
+// CHECK:         %[[INDEX_97:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_125:.*]] = dxsa.operand %[[INDEX_97]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_98:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_126:.*]] = dxsa.operand %[[INDEX_98]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_125]], %[[OPERAND_126]]
+// CHECK:         %[[INDEX_99:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_127:.*]] = dxsa.operand %[[INDEX_99]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_100:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_128:.*]] = dxsa.operand %[[INDEX_100]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_127]], %[[OPERAND_128]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <x>>, r<0, <w>>
 // CHECK:         dxsa.and r<0, <x>>, r<0, <x>>, r<0, <z>>
 // CHECK:         dxsa.utof r<0, <x>>, r<0, <x>>
 // CHECK:         dxsa.add r<3>, r<0, <x, x, x, x>>, r<3>
 // CHECK:         dxsa.mov r<4, <x, y>>, r<4, <z, w, z, z>>
-// CHECK:         %[[INDEX_19:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_19]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_20:.*]] = dxsa.index.imm {imm = 6 : i32}
-// CHECK:         %[[OPERAND_21:.*]] = dxsa.operand %[[INDEX_20]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_20]], %[[OPERAND_21]]
+// CHECK:         %[[INDEX_101:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_129:.*]] = dxsa.operand %[[INDEX_101]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_102:.*]] = dxsa.index.imm {imm = 6 : i32}
+// CHECK:         %[[OPERAND_130:.*]] = dxsa.operand %[[INDEX_102]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_129]], %[[OPERAND_130]]
 // CHECK:         dxsa.mov r<4, <z>>, r<7, <x>>
-// CHECK:         %[[INDEX_21:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_22:.*]] = dxsa.operand %[[INDEX_21]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_22:.*]] = dxsa.index.imm {imm = 8 : i32}
-// CHECK:         %[[OPERAND_23:.*]] = dxsa.operand %[[INDEX_22]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_22]], %[[OPERAND_23]]
+// CHECK:         %[[INDEX_103:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_131:.*]] = dxsa.operand %[[INDEX_103]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_104:.*]] = dxsa.index.imm {imm = 8 : i32}
+// CHECK:         %[[OPERAND_132:.*]] = dxsa.operand %[[INDEX_104]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_131]], %[[OPERAND_132]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <x>>, r<0, <z>>
 // CHECK:         dxsa.add r<3, <x, y, z>>, r<3, <x, y, z, x>>, r<4, <x, y, z, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8C0000E3, 0x8001A302, 0x00199983, 0x0000D000, 0x00100012, 0x00000002, 0x0010001A, 0x00000000, 0x00004001, 0x00000020, 0x0011EE46, 0x00000001]>
-// CHECK:         %[[INDEX_23:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_24:.*]] = dxsa.operand %[[INDEX_23]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_24:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_25:.*]] = dxsa.operand %[[INDEX_24]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_24]], %[[OPERAND_25]]
+// CHECK:         %[[OPERAND_133:.*]] = dxsa.operand  {num_components = 0 : i32, type = 13 : i32}
+// CHECK:         %[[INDEX_105:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_134:.*]] = dxsa.operand %[[INDEX_105]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_106:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_135:.*]] = dxsa.operand %[[INDEX_106]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_136:.*]] = dxsa.operand.imm {imm = dense<32> : vector<1xi32>}
+// CHECK:         %[[INDEX_107:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_137:.*]] = dxsa.operand %[[INDEX_107]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_133]], %[[OPERAND_134]], %[[OPERAND_135]], %[[OPERAND_136]], %[[OPERAND_137]]
+// CHECK:         %[[INDEX_108:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_138:.*]] = dxsa.operand %[[INDEX_108]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_109:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_139:.*]] = dxsa.operand %[[INDEX_109]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_138]], %[[OPERAND_139]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <x>>, r<0, <z>>
-// CHECK:         dxsa.unknown <tokens = [0x8C0000E3, 0x8001A302, 0x00199983, 0x0000D000, 0x00100012, 0x00000002, 0x0010001A, 0x00000000, 0x00004001, 0x00000030, 0x0011E006, 0x00000001]>
-// CHECK:         dxsa.unknown <tokens = [0x8C0000E3, 0x8001A302, 0x00199983, 0x0000D000, 0x00100012, 0x00000004, 0x0010001A, 0x00000000, 0x00004001, 0x00000000, 0x0011EE46, 0x00000001]>
-// CHECK:         %[[INDEX_25:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_26:.*]] = dxsa.operand %[[INDEX_25]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_26:.*]] = dxsa.index.imm {imm = 4 : i32}
-// CHECK:         %[[OPERAND_27:.*]] = dxsa.operand %[[INDEX_26]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_26]], %[[OPERAND_27]]
-// CHECK:         %[[INDEX_27:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_28:.*]] = dxsa.operand %[[INDEX_27]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_28:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_29:.*]] = dxsa.operand %[[INDEX_28]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_28]], %[[OPERAND_29]]
+// CHECK:         %[[OPERAND_140:.*]] = dxsa.operand  {num_components = 0 : i32, type = 13 : i32}
+// CHECK:         %[[INDEX_110:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_141:.*]] = dxsa.operand %[[INDEX_110]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_111:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_142:.*]] = dxsa.operand %[[INDEX_111]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_143:.*]] = dxsa.operand.imm {imm = dense<48> : vector<1xi32>}
+// CHECK:         %[[INDEX_112:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_144:.*]] = dxsa.operand %[[INDEX_112]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_140]], %[[OPERAND_141]], %[[OPERAND_142]], %[[OPERAND_143]], %[[OPERAND_144]]
+// CHECK:         %[[OPERAND_145:.*]] = dxsa.operand  {num_components = 0 : i32, type = 13 : i32}
+// CHECK:         %[[INDEX_113:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_146:.*]] = dxsa.operand %[[INDEX_113]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_114:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_147:.*]] = dxsa.operand %[[INDEX_114]] {num_components = 4 : i32, one = 1 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_148:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_115:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_149:.*]] = dxsa.operand %[[INDEX_115]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_structured_s" %[[OPERAND_145]], %[[OPERAND_146]], %[[OPERAND_147]], %[[OPERAND_148]], %[[OPERAND_149]]
+// CHECK:         %[[INDEX_116:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_150:.*]] = dxsa.operand %[[INDEX_116]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_117:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_151:.*]] = dxsa.operand %[[INDEX_117]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_150]], %[[OPERAND_151]]
+// CHECK:         %[[INDEX_118:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_152:.*]] = dxsa.operand %[[INDEX_118]] {mask = 64 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_119:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_153:.*]] = dxsa.operand %[[INDEX_119]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_152]], %[[OPERAND_153]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <x>>, r<0, <z>>
 // CHECK:         dxsa.utof r<0, <x>>, r<0, <x>>
 // CHECK:         dxsa.add r<3>, r<0, <x, x, x, x>>, r<3>
-// CHECK:         %[[INDEX_29:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_30:.*]] = dxsa.operand %[[INDEX_29]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_30:.*]] = dxsa.index.imm {imm = 9 : i32}
-// CHECK:         %[[OPERAND_31:.*]] = dxsa.operand %[[INDEX_30]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_30]], %[[OPERAND_31]]
+// CHECK:         %[[INDEX_120:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_154:.*]] = dxsa.operand %[[INDEX_120]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_121:.*]] = dxsa.index.imm {imm = 9 : i32}
+// CHECK:         %[[OPERAND_155:.*]] = dxsa.operand %[[INDEX_121]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_154]], %[[OPERAND_155]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <y>>, r<0, <x>>
 // CHECK:         dxsa.mov r<6, <y>>, r<10, <x>>
 // CHECK:         dxsa.and r<0, <y, z>>, r<5, <z, z, z, z>>, r<6, <y, y, w, y>>
 // CHECK:         dxsa.or r<0, <y, z>>, r<1, <x, x, y, x>>, r<0, <y, y, z, y>>
 // CHECK:         dxsa.or r<0, <y, z>>, r<0, <y, y, z, y>>, r<2, <z, z, w, z>>
 // CHECK:         dxsa.mov r<12, <y>>, r<10, <w>>
-// CHECK:         %[[INDEX_31:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_32:.*]] = dxsa.operand %[[INDEX_31]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_32:.*]] = dxsa.index.imm {imm = 11 : i32}
-// CHECK:         %[[OPERAND_33:.*]] = dxsa.operand %[[INDEX_32]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_32]], %[[OPERAND_33]]
+// CHECK:         %[[INDEX_122:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_156:.*]] = dxsa.operand %[[INDEX_122]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_123:.*]] = dxsa.index.imm {imm = 11 : i32}
+// CHECK:         %[[OPERAND_157:.*]] = dxsa.operand %[[INDEX_123]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_156]], %[[OPERAND_157]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <x>>, r<0, <w>>
 // CHECK:         dxsa.and r<1, <x, y>>, r<7, <z, z, z, z>>, r<12, <x, y, x, x>>
-// CHECK:         %[[INDEX_33:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_34:.*]] = dxsa.operand %[[INDEX_33]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_34:.*]] = dxsa.index.imm {imm = 13 : i32}
-// CHECK:         %[[OPERAND_35:.*]] = dxsa.operand %[[INDEX_34]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_34]], %[[OPERAND_35]]
+// CHECK:         %[[INDEX_124:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_158:.*]] = dxsa.operand %[[INDEX_124]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_125:.*]] = dxsa.index.imm {imm = 13 : i32}
+// CHECK:         %[[OPERAND_159:.*]] = dxsa.operand %[[INDEX_125]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_158]], %[[OPERAND_159]]
 // CHECK:         dxsa.and r<0, <x>>, r<0, <x>>, r<0, <w>>
 // CHECK:         dxsa.utof r<0, <x>>, r<0, <x>>
 // CHECK:         dxsa.or r<0, <y, z>>, r<0, <y, y, z, y>>, r<1, <x, x, y, x>>
@@ -221,32 +436,32 @@
 // CHECK:         dxsa.add r<0>, r<0, <x, x, x, x>>, r<3>
 // CHECK:         dxsa.mul r<1, <x>>, v<0, <x>>, l(0x40400000)
 // CHECK:         dxsa.ftou r<1, <x>>, r<1, <x>>
-// CHECK:         %[[INDEX_35:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_36:.*]] = dxsa.operand %[[INDEX_35]] {mask = 48 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_36:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_37:.*]] = dxsa.operand %[[INDEX_36]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_38:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
-// CHECK:         %[[INDEX_37:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_39:.*]] = dxsa.operand %[[INDEX_37]] {num_components = 4 : i32, swizzle = dense<[0, 1, 0, 0]> : vector<4xi32>, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_36]], %[[OPERAND_37]], %[[OPERAND_38]], %[[OPERAND_39]]
-// CHECK:         %[[INDEX_38:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_40:.*]] = dxsa.operand %[[INDEX_38]] {mask = 112 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_39:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_41:.*]] = dxsa.operand %[[INDEX_39]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         %[[OPERAND_42:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
-// CHECK:         %[[INDEX_40:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_43:.*]] = dxsa.operand %[[INDEX_40]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 0]> : vector<4xi32>, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_40]], %[[OPERAND_41]], %[[OPERAND_42]], %[[OPERAND_43]]
+// CHECK:         %[[INDEX_126:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_160:.*]] = dxsa.operand %[[INDEX_126]] {mask = 48 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_127:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_161:.*]] = dxsa.operand %[[INDEX_127]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_162:.*]] = dxsa.operand.imm {imm = dense<0> : vector<1xi32>}
+// CHECK:         %[[INDEX_128:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_163:.*]] = dxsa.operand %[[INDEX_128]] {num_components = 4 : i32, swizzle = dense<[0, 1, 0, 0]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_160]], %[[OPERAND_161]], %[[OPERAND_162]], %[[OPERAND_163]]
+// CHECK:         %[[INDEX_129:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_164:.*]] = dxsa.operand %[[INDEX_129]] {mask = 112 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_130:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_165:.*]] = dxsa.operand %[[INDEX_130]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[OPERAND_166:.*]] = dxsa.operand.imm {imm = dense<8> : vector<1xi32>}
+// CHECK:         %[[INDEX_131:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_167:.*]] = dxsa.operand %[[INDEX_131]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 0]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_164]], %[[OPERAND_165]], %[[OPERAND_166]], %[[OPERAND_167]]
 // CHECK:         dxsa.ftoi r<1, <y, z>>, r<0, <y, y, w, y>>
 // CHECK:         dxsa.mov o<0>, r<0>
-// CHECK:         %[[INDEX_41:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_44:.*]] = dxsa.operand %[[INDEX_41]] {mask = 48 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_42:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_45:.*]] = dxsa.operand %[[INDEX_42]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_43:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_46:.*]] = dxsa.operand %[[INDEX_43]] {num_components = 4 : i32, one = 3 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_44:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_47:.*]] = dxsa.operand %[[INDEX_44]] {num_components = 4 : i32, swizzle = dense<[1, 2, 1, 1]> : vector<4xi32>, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_44]], %[[OPERAND_45]], %[[OPERAND_46]], %[[OPERAND_47]]
+// CHECK:         %[[INDEX_132:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_168:.*]] = dxsa.operand %[[INDEX_132]] {mask = 48 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_133:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_169:.*]] = dxsa.operand %[[INDEX_133]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_134:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_170:.*]] = dxsa.operand %[[INDEX_134]] {num_components = 4 : i32, one = 3 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_135:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_171:.*]] = dxsa.operand %[[INDEX_135]] {num_components = 4 : i32, swizzle = dense<[1, 2, 1, 1]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_structured" %[[OPERAND_168]], %[[OPERAND_169]], %[[OPERAND_170]], %[[OPERAND_171]]
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/uav_raw1.test b/mlir/test/Target/DXSA/hlsl/uav_raw1.test
index 94f9725a04d1..77bd5ef9095c 100644
--- a/mlir/test/Target/DXSA/hlsl/uav_raw1.test
+++ b/mlir/test/Target/DXSA/hlsl/uav_raw1.test
@@ -8,24 +8,37 @@
 // CHECK:         dxsa.dcl_input_ps  constant v<0, <y>>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 2
-// CHECK:         dxsa.unknown <tokens = [0x890000A5, 0x800002C2, 0x00199983, 0x00100012, 0x00000000, 0x0010100A, 0x00000000, 0x0011E006, 0x00000003]>
-// CHECK:         dxsa.utof r<0, <x>>, r<0, <x>>
-// CHECK:         dxsa.unknown <tokens = [0x8A0000E2, 0x800002C2, 0x00199983, 0x0000D000, 0x00100012, 0x00000001, 0x0010100A, 0x00000000, 0x0011E006, 0x00000003]>
 // CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 1 : i32}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
+// CHECK:         dxsa.utof r<0, <x>>, r<0, <x>>
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand  {num_components = 0 : i32, type = 13 : i32}
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_3]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, one = 0 : i32, type = 1 : i32}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_raw_s" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]]
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_6]] {mask = 32 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_7]], %[[OPERAND_8]]
 // CHECK:         dxsa.utof r<0, <y>>, r<0, <y>>
 // CHECK:         dxsa.mad r<0>, r<0, <y, y, y, y>>, l(0x40000000, 0x40000000, 0x40000000, 0x40000000), r<0, <x, x, x, x>>
 // CHECK:         dxsa.ftou r<1, <x>>, r<0, <w>>
 // CHECK:         dxsa.mov o<0>, r<0>
-// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 3 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 240 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 1 : i32, type = 1 : i32}
-// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_2]], %[[OPERAND_3]], %[[OPERAND_4]]
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_8]] {mask = 240 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_9]] {num_components = 4 : i32, one = 1 : i32, type = 1 : i32}
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_raw" %[[OPERAND_9]], %[[OPERAND_10]], %[[OPERAND_11]]
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/uav_typed_load_store1.test b/mlir/test/Target/DXSA/hlsl/uav_typed_load_store1.test
index a479e7f0c52c..56050a610391 100644
--- a/mlir/test/Target/DXSA/hlsl/uav_typed_load_store1.test
+++ b/mlir/test/Target/DXSA/hlsl/uav_typed_load_store1.test
@@ -8,24 +8,43 @@
 // CHECK:         dxsa.dcl_input_ps  constant v<0, <z, w>>
 // CHECK:         dxsa.dcl_output o<0>
 // CHECK:         dxsa.dcl_temps 2
-// CHECK:         dxsa.unknown <tokens = [0x890000A3, 0x800000C2, 0x00155543, 0x001000F2, 0x00000000, 0x00101FE6, 0x00000000, 0x0011EE46, 0x00000003]>
-// CHECK:         dxsa.unknown <tokens = [0x890000A3, 0x800000C2, 0x00155543, 0x001000F2, 0x00000001, 0x00101546, 0x00000000, 0x0011EE46, 0x00000003]>
+// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, swizzle = dense<[2, 3, 3, 3]> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_uav_typed" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 240 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, swizzle = dense<[0, 1, 1, 1]> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_uav_typed" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]]
 // CHECK:         dxsa.add r<0>, r<0>, r<1>
-// CHECK:         dxsa.unknown <tokens = [0x8A0000E1, 0x800000C2, 0x00155543, 0x0000D000, 0x00100012, 0x00000001, 0x00101546, 0x00000000, 0x0011EE46, 0x00000003]>
-// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 1 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand  {num_components = 0 : i32, type = 13 : i32}
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_6]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, swizzle = dense<[0, 1, 1, 1]> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_uav_typed_s" %[[OPERAND_6]], %[[OPERAND_7]], %[[OPERAND_8]], %[[OPERAND_9]]
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_9]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_10]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_10]], %[[OPERAND_11]]
 // CHECK:         dxsa.utof r<1, <x>>, r<1, <x>>
 // CHECK:         dxsa.mad r<0>, r<1, <x, x, x, x>>, l(0x40000000, 0x40000000, 0x40000000, 0x40000000), r<0>
-// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 3 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 240 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, swizzle = dense<[2, 3, 3, 3]> : vector<4xi32>, type = 1 : i32}
-// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_uav_typed" %[[OPERAND_2]], %[[OPERAND_3]], %[[OPERAND_4]]
+// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_11]] {mask = 240 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_12]] {num_components = 4 : i32, swizzle = dense<[2, 3, 3, 3]> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_13]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_uav_typed" %[[OPERAND_12]], %[[OPERAND_13]], %[[OPERAND_14]]
 // CHECK:         dxsa.mov o<0>, r<0>
 // CHECK:         dxsa.ret
 
diff --git a/mlir/test/Target/DXSA/hlsl/uav_typed_load_store2.test b/mlir/test/Target/DXSA/hlsl/uav_typed_load_store2.test
index 431c092cc75a..9aa085034040 100644
--- a/mlir/test/Target/DXSA/hlsl/uav_typed_load_store2.test
+++ b/mlir/test/Target/DXSA/hlsl/uav_typed_load_store2.test
@@ -8,31 +8,58 @@
 // CHECK:         dxsa.dcl_input_ps  constant v<0, <y>>
 // CHECK:         dxsa.dcl_output o<0, <x, y, z>>
 // CHECK:         dxsa.dcl_temps 5
-// CHECK:         dxsa.unknown <tokens = [0x8A0000A3, 0x80000042, 0x000CCCC3, 0x80100072, 0x00010001, 0x00000000, 0x00101556, 0x00000000, 0x0011EE46, 0x00000003]>
-// CHECK:         dxsa.unknown <tokens = [0x8A0000A3, 0x80000042, 0x000CCCC3, 0x80100072, 0x00010001, 0x00000001, 0x00101006, 0x00000000, 0x0011EE46, 0x00000003]>
+// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 112 : i32, min_precision = 4 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, swizzle = dense<1> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_uav_typed" %[[OPERAND_0]], %[[OPERAND_1]], %[[OPERAND_2]]
+// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 1 : i32}
+// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {mask = 112 : i32, min_precision = 4 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_uav_typed" %[[OPERAND_3]], %[[OPERAND_4]], %[[OPERAND_5]]
 // CHECK:         dxsa.iadd r<2, <x, y, z>>, r<0, min16i, <x, y, z, x>>, r<1, min16i, <x, y, z, x>>
-// CHECK:         dxsa.unknown <tokens = [0x8A0000E1, 0x80000042, 0x000CCCC3, 0x0000D000, 0x00100012, 0x00000003, 0x00101556, 0x00000000, 0x0011E276, 0x00000003]>
-// CHECK:         dxsa.unknown <tokens = [0x8C0000E1, 0x80000042, 0x000CCCC3, 0x80100072, 0x00010001, 0x00000000, 0x00100012, 0x00000004, 0x00101006, 0x00000000, 0x0011E276, 0x00000003]>
-// CHECK:         %[[INDEX_0:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_0:.*]] = dxsa.operand %[[INDEX_0]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_1:.*]] = dxsa.index.imm {imm = 3 : i32}
-// CHECK:         %[[OPERAND_1:.*]] = dxsa.operand %[[INDEX_1]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_0]], %[[OPERAND_1]]
+// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand  {num_components = 0 : i32, type = 13 : i32}
+// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_7:.*]] = dxsa.operand %[[INDEX_6]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_7:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_8:.*]] = dxsa.operand %[[INDEX_7]] {num_components = 4 : i32, swizzle = dense<1> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_8:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_9:.*]] = dxsa.operand %[[INDEX_8]] {num_components = 4 : i32, swizzle = dense<[3, 1, 2, 0]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_uav_typed_s" %[[OPERAND_6]], %[[OPERAND_7]], %[[OPERAND_8]], %[[OPERAND_9]]
+// CHECK:         %[[INDEX_9:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_10:.*]] = dxsa.operand %[[INDEX_9]] {mask = 112 : i32, min_precision = 4 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_10:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_11:.*]] = dxsa.operand %[[INDEX_10]] {mask = 16 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_11:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_12:.*]] = dxsa.operand %[[INDEX_11]] {num_components = 4 : i32, swizzle = dense<0> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_12:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_13:.*]] = dxsa.operand %[[INDEX_12]] {num_components = 4 : i32, swizzle = dense<[3, 1, 2, 0]> : vector<4xi32>, type = 30 : i32}
+// CHECK:         dxsa.instruction "ld_uav_typed_s" %[[OPERAND_10]], %[[OPERAND_11]], %[[OPERAND_12]], %[[OPERAND_13]]
+// CHECK:         %[[INDEX_13:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_14:.*]] = dxsa.operand %[[INDEX_13]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_14:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_15:.*]] = dxsa.operand %[[INDEX_14]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_14]], %[[OPERAND_15]]
 // CHECK:         dxsa.iadd r<2, <x, y, z>>, r<2, <w, w, w, w>>, r<2, <x, y, z, x>>
-// CHECK:         %[[INDEX_2:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_2:.*]] = dxsa.operand %[[INDEX_2]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
-// CHECK:         %[[INDEX_3:.*]] = dxsa.index.imm {imm = 4 : i32}
-// CHECK:         %[[OPERAND_3:.*]] = dxsa.operand %[[INDEX_3]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
-// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_2]], %[[OPERAND_3]]
+// CHECK:         %[[INDEX_15:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_16:.*]] = dxsa.operand %[[INDEX_15]] {mask = 128 : i32, num_components = 4 : i32, type = 0 : i32}
+// CHECK:         %[[INDEX_16:.*]] = dxsa.index.imm {imm = 4 : i32}
+// CHECK:         %[[OPERAND_17:.*]] = dxsa.operand %[[INDEX_16]] {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK:         dxsa.instruction "check_access_fully_mapped" %[[OPERAND_16]], %[[OPERAND_17]]
 // CHECK:         dxsa.iadd r<2, <x, y, z>>, r<0, min16i, <x, y, z, x>>, r<2, <x, y, z, x>>
 // CHECK:         dxsa.iadd r<2, <x, y, z>>, r<2, <w, w, w, w>>, r<2, <x, y, z, x>>
-// CHECK:         %[[INDEX_4:.*]] = dxsa.index.imm {imm = 3 : i32}
-// CHECK:         %[[OPERAND_4:.*]] = dxsa.operand %[[INDEX_4]] {mask = 240 : i32, num_components = 4 : i32, type = 30 : i32}
-// CHECK:         %[[INDEX_5:.*]] = dxsa.index.imm {imm = 0 : i32}
-// CHECK:         %[[OPERAND_5:.*]] = dxsa.operand %[[INDEX_5]] {num_components = 4 : i32, swizzle = dense<1> : vector<4xi32>, type = 1 : i32}
-// CHECK:         %[[INDEX_6:.*]] = dxsa.index.imm {imm = 2 : i32}
-// CHECK:         %[[OPERAND_6:.*]] = dxsa.operand %[[INDEX_6]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 0]> : vector<4xi32>, type = 0 : i32}
-// CHECK:         dxsa.instruction "store_uav_typed" %[[OPERAND_4]], %[[OPERAND_5]], %[[OPERAND_6]]
+// CHECK:         %[[INDEX_17:.*]] = dxsa.index.imm {imm = 3 : i32}
+// CHECK:         %[[OPERAND_18:.*]] = dxsa.operand %[[INDEX_17]] {mask = 240 : i32, num_components = 4 : i32, type = 30 : i32}
+// CHECK:         %[[INDEX_18:.*]] = dxsa.index.imm {imm = 0 : i32}
+// CHECK:         %[[OPERAND_19:.*]] = dxsa.operand %[[INDEX_18]] {num_components = 4 : i32, swizzle = dense<1> : vector<4xi32>, type = 1 : i32}
+// CHECK:         %[[INDEX_19:.*]] = dxsa.index.imm {imm = 2 : i32}
+// CHECK:         %[[OPERAND_20:.*]] = dxsa.operand %[[INDEX_19]] {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 0]> : vector<4xi32>, type = 0 : i32}
+// CHECK:         dxsa.instruction "store_uav_typed" %[[OPERAND_18]], %[[OPERAND_19]], %[[OPERAND_20]]
 // CHECK:         dxsa.mov o<0, <x, y, z>>, r<2, <x, y, z, x>>
 // CHECK:         dxsa.ret