diff --git a/CHANGELOG.md b/CHANGELOG.md
index 3b28dee98d3..d6b25c71a76 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -15,6 +15,8 @@ full changeset diff at the end of each section.
 Current Trunk
 -------------
 
+- Reject non-natural alignment for atomic memory operations at parse time (#8962)
+
 v132
 ----
 
diff --git a/scripts/test/generate_atomic_spec_test.py b/scripts/test/generate_atomic_spec_test.py
index c4b2571500d..b6200b8c0a9 100644
--- a/scripts/test/generate_atomic_spec_test.py
+++ b/scripts/test/generate_atomic_spec_test.py
@@ -38,6 +38,21 @@ class Template:
     bin: bytes = b""
 
 
+def natural_access_bytes(op: str) -> int:
+    """Natural alignment width in bytes for an atomic memory operation."""
+    if "load32" in op or "store32" in op or "rmw32" in op:
+        return 4
+    if "load16" in op or "store16" in op or "rmw16" in op:
+        return 2
+    if "load8" in op or "store8" in op or "rmw8" in op:
+        return 1
+    if op.startswith("i64."):
+        return 8
+    if op.startswith("i32."):
+        return 4
+    raise ValueError(f"unknown atomic op: {op}")
+
+
 atomic_fence_template = Template(op="atomic.fence", value_type=None, args=0, should_drop=False, bin=b"\xfe\x03")
 load_store_acqrel_templates = [
     Template(op="i32.atomic.load", value_type=ValueType.i32, args=1, should_drop=True, bin=b"\xfe\x10"),
@@ -224,7 +239,7 @@ def bin_statement_lines(template: Template, mem_idx: int, mem_ptr_type: ValueTyp
 
     has_ordering = ordering is not None
     has_mem_idx = mem_idx is not None
-    raw_alignment = int(math.log2(template.value_type.value // 8))
+    raw_alignment = int(math.log2(natural_access_bytes(template.op)))
     alignment = raw_alignment | (has_ordering << 4) | (has_mem_idx << 6)
     comment = f"Alignment of {raw_alignment}" \
               f'{" with bit 4 set indicating that an ordering immediate follows" if has_ordering else ""}' \
diff --git a/scripts/test/shared.py b/scripts/test/shared.py
index cad9ce4b930..77b36105abf 100644
--- a/scripts/test/shared.py
+++ b/scripts/test/shared.py
@@ -415,9 +415,6 @@ def get_tests(test_dir, extensions=[], recursive=False):
 
     # Requires better support for multi-threaded tests
     'threads/wait_notify.wast',
-
-    # Non-natural alignment is invalid for atomic operations
-    'threads/atomic.wast',
 ]
 SPEC_TESTSUITE_PROPOSALS_TO_SKIP = [
 ]
diff --git a/src/parser/contexts.h b/src/parser/contexts.h
index 9602a17ce1f..6f0d38f9cd4 100644
--- a/src/parser/contexts.h
+++ b/src/parser/contexts.h
@@ -2394,8 +2394,9 @@ struct ParseDefsCtx : TypeParserCtx<ParseDefsCtx>, AnnotationParserCtx {
     auto m = getMemory(pos, mem);
     CHECK_ERR(m);
     if (isAtomic) {
-      return withLoc(
-        pos, irBuilder.makeAtomicLoad(bytes, memarg.offset, type, *m, order));
+      return withLoc(pos,
+                     irBuilder.makeAtomicLoad(
+                       bytes, memarg.offset, memarg.align, type, *m, order));
     }
     return withLoc(pos,
                    irBuilder.makeLoad(
@@ -2413,8 +2414,9 @@ struct ParseDefsCtx : TypeParserCtx<ParseDefsCtx>, AnnotationParserCtx {
     auto m = getMemory(pos, mem);
     CHECK_ERR(m);
     if (isAtomic) {
-      return withLoc(
-        pos, irBuilder.makeAtomicStore(bytes, memarg.offset, type, *m, order));
+      return withLoc(pos,
+                     irBuilder.makeAtomicStore(
+                       bytes, memarg.offset, memarg.align, type, *m, order));
     }
     return withLoc(
       pos, irBuilder.makeStore(bytes, memarg.offset, memarg.align, type, *m));
@@ -2454,8 +2456,9 @@ struct ParseDefsCtx : TypeParserCtx<ParseDefsCtx>, AnnotationParserCtx {
                          MemoryOrder order) {
     auto m = getMemory(pos, mem);
     CHECK_ERR(m);
-    return withLoc(
-      pos, irBuilder.makeAtomicRMW(op, bytes, memarg.offset, type, *m, order));
+    return withLoc(pos,
+                   irBuilder.makeAtomicRMW(
+                     op, bytes, memarg.offset, memarg.align, type, *m, order));
   }
 
   Result<> makeAtomicCmpxchg(Index pos,
@@ -2467,8 +2470,9 @@ struct ParseDefsCtx : TypeParserCtx<ParseDefsCtx>, AnnotationParserCtx {
                              MemoryOrder order) {
     auto m = getMemory(pos, mem);
     CHECK_ERR(m);
-    return withLoc(
-      pos, irBuilder.makeAtomicCmpxchg(bytes, memarg.offset, type, *m, order));
+    return withLoc(pos,
+                   irBuilder.makeAtomicCmpxchg(
+                     bytes, memarg.offset, memarg.align, type, *m, order));
   }
 
   Result<> makeAtomicWait(Index pos,
@@ -2478,7 +2482,8 @@ struct ParseDefsCtx : TypeParserCtx<ParseDefsCtx>, AnnotationParserCtx {
                           Memarg memarg) {
     auto m = getMemory(pos, mem);
     CHECK_ERR(m);
-    return withLoc(pos, irBuilder.makeAtomicWait(type, memarg.offset, *m));
+    return withLoc(
+      pos, irBuilder.makeAtomicWait(type, memarg.offset, memarg.align, *m));
   }
 
   Result<> makeAtomicNotify(Index pos,
@@ -2487,7 +2492,8 @@ struct ParseDefsCtx : TypeParserCtx<ParseDefsCtx>, AnnotationParserCtx {
                             Memarg memarg) {
     auto m = getMemory(pos, mem);
     CHECK_ERR(m);
-    return withLoc(pos, irBuilder.makeAtomicNotify(memarg.offset, *m));
+    return withLoc(pos,
+                   irBuilder.makeAtomicNotify(memarg.offset, memarg.align, *m));
   }
 
   Result<> makeAtomicFence(Index pos,
diff --git a/src/passes/DeAlign.cpp b/src/passes/DeAlign.cpp
index 4de36cc88ce..52b20b28634 100644
--- a/src/passes/DeAlign.cpp
+++ b/src/passes/DeAlign.cpp
@@ -31,9 +31,19 @@ struct DeAlign : public WalkerPass<PostWalker<DeAlign>> {
     return std::make_unique<DeAlign>();
   }
 
-  void visitLoad(Load* curr) { curr->align = 1; }
+  void visitLoad(Load* curr) {
+    if (curr->isAtomic()) {
+      return;
+    }
+    curr->align = 1;
+  }
 
-  void visitStore(Store* curr) { curr->align = 1; }
+  void visitStore(Store* curr) {
+    if (curr->isAtomic()) {
+      return;
+    }
+    curr->align = 1;
+  }
 
   void visitSIMDLoad(SIMDLoad* curr) { curr->align = 1; }
 
diff --git a/src/wasm-ir-builder.h b/src/wasm-ir-builder.h
index 5998dc87428..6b68c27b686 100644
--- a/src/wasm-ir-builder.h
+++ b/src/wasm-ir-builder.h
@@ -155,20 +155,33 @@ class IRBuilder : public UnifiedExpressionVisitor<IRBuilder, Result<>> {
                     Name mem);
   Result<> makeStore(
     unsigned bytes, Address offset, unsigned align, Type type, Name mem);
-  Result<> makeAtomicLoad(
-    unsigned bytes, Address offset, Type type, Name mem, MemoryOrder order);
-  Result<> makeAtomicStore(
-    unsigned bytes, Address offset, Type type, Name mem, MemoryOrder order);
+  Result<> makeAtomicLoad(unsigned bytes,
+                          Address offset,
+                          Address align,
+                          Type type,
+                          Name mem,
+                          MemoryOrder order);
+  Result<> makeAtomicStore(unsigned bytes,
+                           Address offset,
+                           Address align,
+                           Type type,
+                           Name mem,
+                           MemoryOrder order);
   Result<> makeAtomicRMW(AtomicRMWOp op,
                          unsigned bytes,
                          Address offset,
+                         Address align,
                          Type type,
                          Name mem,
                          MemoryOrder order);
-  Result<> makeAtomicCmpxchg(
-    unsigned bytes, Address offset, Type type, Name mem, MemoryOrder order);
-  Result<> makeAtomicWait(Type type, Address offset, Name mem);
-  Result<> makeAtomicNotify(Address offset, Name mem);
+  Result<> makeAtomicCmpxchg(unsigned bytes,
+                             Address offset,
+                             Address align,
+                             Type type,
+                             Name mem,
+                             MemoryOrder order);
+  Result<> makeAtomicWait(Type type, Address offset, Address align, Name mem);
+  Result<> makeAtomicNotify(Address offset, Address align, Name mem);
   Result<> makeAtomicFence(MemoryOrder order);
   Result<> makePause();
   Result<> makeSIMDExtract(SIMDExtractOp op, uint8_t lane);
diff --git a/src/wasm/wasm-binary.cpp b/src/wasm/wasm-binary.cpp
index fc88a5dd997..43b528bebca 100644
--- a/src/wasm/wasm-binary.cpp
+++ b/src/wasm/wasm-binary.cpp
@@ -3934,105 +3934,111 @@ Result<> WasmBinaryReader::readInst() {
       auto op = getU32LEB();
       switch (op) {
         case BinaryConsts::I32AtomicLoad8U: {
-          // TODO: pass align through for validation.
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicLoad(1, offset, Type::i32, mem, memoryOrder);
+          return builder.makeAtomicLoad(
+            1, offset, align, Type::i32, mem, memoryOrder);
         }
         case BinaryConsts::I32AtomicLoad16U: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicLoad(2, offset, Type::i32, mem, memoryOrder);
+          return builder.makeAtomicLoad(
+            2, offset, align, Type::i32, mem, memoryOrder);
         }
         case BinaryConsts::I32AtomicLoad: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicLoad(4, offset, Type::i32, mem, memoryOrder);
+          return builder.makeAtomicLoad(
+            4, offset, align, Type::i32, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicLoad8U: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicLoad(1, offset, Type::i64, mem, memoryOrder);
+          return builder.makeAtomicLoad(
+            1, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicLoad16U: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicLoad(2, offset, Type::i64, mem, memoryOrder);
+          return builder.makeAtomicLoad(
+            2, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicLoad32U: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicLoad(4, offset, Type::i64, mem, memoryOrder);
+          return builder.makeAtomicLoad(
+            4, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicLoad: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicLoad(8, offset, Type::i64, mem, memoryOrder);
+          return builder.makeAtomicLoad(
+            8, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I32AtomicStore8: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
           return builder.makeAtomicStore(
-            1, offset, Type::i32, mem, memoryOrder);
+            1, offset, align, Type::i32, mem, memoryOrder);
         }
         case BinaryConsts::I32AtomicStore16: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
           return builder.makeAtomicStore(
-            2, offset, Type::i32, mem, memoryOrder);
+            2, offset, align, Type::i32, mem, memoryOrder);
         }
         case BinaryConsts::I32AtomicStore: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
           return builder.makeAtomicStore(
-            4, offset, Type::i32, mem, memoryOrder);
+            4, offset, align, Type::i32, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicStore8: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
           return builder.makeAtomicStore(
-            1, offset, Type::i64, mem, memoryOrder);
+            1, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicStore16: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
           return builder.makeAtomicStore(
-            2, offset, Type::i64, mem, memoryOrder);
+            2, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicStore32: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
           return builder.makeAtomicStore(
-            4, offset, Type::i64, mem, memoryOrder);
+            4, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicStore: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
           return builder.makeAtomicStore(
-            8, offset, Type::i64, mem, memoryOrder);
+            8, offset, align, Type::i64, mem, memoryOrder);
         }
 
 #define RMW(op)                                                                \
   case BinaryConsts::I32AtomicRMW##op: {                                       \
     auto [mem, align, offset, memoryOrder] = getRMWMemarg();                   \
     return builder.makeAtomicRMW(                                              \
-      RMW##op, 4, offset, Type::i32, mem, memoryOrder);                        \
+      RMW##op, 4, offset, align, Type::i32, mem, memoryOrder);                 \
   }                                                                            \
   case BinaryConsts::I32AtomicRMW##op##8U: {                                   \
     auto [mem, align, offset, memoryOrder] = getRMWMemarg();                   \
     return builder.makeAtomicRMW(                                              \
-      RMW##op, 1, offset, Type::i32, mem, memoryOrder);                        \
+      RMW##op, 1, offset, align, Type::i32, mem, memoryOrder);                 \
   }                                                                            \
   case BinaryConsts::I32AtomicRMW##op##16U: {                                  \
     auto [mem, align, offset, memoryOrder] = getRMWMemarg();                   \
     return builder.makeAtomicRMW(                                              \
-      RMW##op, 2, offset, Type::i32, mem, memoryOrder);                        \
+      RMW##op, 2, offset, align, Type::i32, mem, memoryOrder);                 \
   }                                                                            \
   case BinaryConsts::I64AtomicRMW##op: {                                       \
     auto [mem, align, offset, memoryOrder] = getRMWMemarg();                   \
     return builder.makeAtomicRMW(                                              \
-      RMW##op, 8, offset, Type::i64, mem, memoryOrder);                        \
+      RMW##op, 8, offset, align, Type::i64, mem, memoryOrder);                 \
   }                                                                            \
   case BinaryConsts::I64AtomicRMW##op##8U: {                                   \
     auto [mem, align, offset, memoryOrder] = getRMWMemarg();                   \
     return builder.makeAtomicRMW(                                              \
-      RMW##op, 1, offset, Type::i64, mem, memoryOrder);                        \
+      RMW##op, 1, offset, align, Type::i64, mem, memoryOrder);                 \
   }                                                                            \
   case BinaryConsts::I64AtomicRMW##op##16U: {                                  \
     auto [mem, align, offset, memoryOrder] = getRMWMemarg();                   \
     return builder.makeAtomicRMW(                                              \
-      RMW##op, 2, offset, Type::i64, mem, memoryOrder);                        \
+      RMW##op, 2, offset, align, Type::i64, mem, memoryOrder);                 \
   }                                                                            \
   case BinaryConsts::I64AtomicRMW##op##32U: {                                  \
     auto [mem, align, offset, memoryOrder] = getRMWMemarg();                   \
     return builder.makeAtomicRMW(                                              \
-      RMW##op, 4, offset, Type::i64, mem, memoryOrder);                        \
+      RMW##op, 4, offset, align, Type::i64, mem, memoryOrder);                 \
   }
 
           RMW(Add);
@@ -4045,49 +4051,49 @@ Result<> WasmBinaryReader::readInst() {
         case BinaryConsts::I32AtomicCmpxchg: {
           auto [mem, align, offset, memoryOrder] = getRMWMemarg();
           return builder.makeAtomicCmpxchg(
-            4, offset, Type::i32, mem, memoryOrder);
+            4, offset, align, Type::i32, mem, memoryOrder);
         }
         case BinaryConsts::I32AtomicCmpxchg8U: {
           auto [mem, align, offset, memoryOrder] = getRMWMemarg();
           return builder.makeAtomicCmpxchg(
-            1, offset, Type::i32, mem, memoryOrder);
+            1, offset, align, Type::i32, mem, memoryOrder);
         }
         case BinaryConsts::I32AtomicCmpxchg16U: {
           auto [mem, align, offset, memoryOrder] = getRMWMemarg();
           return builder.makeAtomicCmpxchg(
-            2, offset, Type::i32, mem, memoryOrder);
+            2, offset, align, Type::i32, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicCmpxchg: {
           auto [mem, align, offset, memoryOrder] = getRMWMemarg();
           return builder.makeAtomicCmpxchg(
-            8, offset, Type::i64, mem, memoryOrder);
+            8, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicCmpxchg8U: {
           auto [mem, align, offset, memoryOrder] = getRMWMemarg();
           return builder.makeAtomicCmpxchg(
-            1, offset, Type::i64, mem, memoryOrder);
+            1, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicCmpxchg16U: {
           auto [mem, align, offset, memoryOrder] = getRMWMemarg();
           return builder.makeAtomicCmpxchg(
-            2, offset, Type::i64, mem, memoryOrder);
+            2, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I64AtomicCmpxchg32U: {
           auto [mem, align, offset, memoryOrder] = getRMWMemarg();
           return builder.makeAtomicCmpxchg(
-            4, offset, Type::i64, mem, memoryOrder);
+            4, offset, align, Type::i64, mem, memoryOrder);
         }
         case BinaryConsts::I32AtomicWait: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicWait(Type::i32, offset, mem);
+          return builder.makeAtomicWait(Type::i32, offset, align, mem);
         }
         case BinaryConsts::I64AtomicWait: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicWait(Type::i64, offset, mem);
+          return builder.makeAtomicWait(Type::i64, offset, align, mem);
         }
         case BinaryConsts::AtomicNotify: {
           auto [mem, align, offset, memoryOrder] = getAtomicMemarg();
-          return builder.makeAtomicNotify(offset, mem);
+          return builder.makeAtomicNotify(offset, align, mem);
         }
         case BinaryConsts::AtomicFence: {
           MemoryOrder order = getMemoryOrder(/*isRMW=*/false);
diff --git a/src/wasm/wasm-ir-builder.cpp b/src/wasm/wasm-ir-builder.cpp
index e4c753fb220..3cd1c20cfea 100644
--- a/src/wasm/wasm-ir-builder.cpp
+++ b/src/wasm/wasm-ir-builder.cpp
@@ -92,6 +92,13 @@ Result<> validateTypeAnnotation(HeapType type, Expression* child) {
   return validateTypeAnnotation(Type(type, Nullable), child);
 }
 
+Result<> requireNaturalAtomicAlign(Address align, Address natural) {
+  if (align != natural) {
+    return Err{"atomic accesses must have natural alignment"};
+  }
+  return Ok{};
+}
+
 } // anonymous namespace
 
 Result<Index> IRBuilder::addScratchLocal(Type type) {
@@ -1634,8 +1641,13 @@ Result<> IRBuilder::makeStore(
   return Ok{};
 }
 
-Result<> IRBuilder::makeAtomicLoad(
-  unsigned bytes, Address offset, Type type, Name mem, MemoryOrder order) {
+Result<> IRBuilder::makeAtomicLoad(unsigned bytes,
+                                   Address offset,
+                                   Address align,
+                                   Type type,
+                                   Name mem,
+                                   MemoryOrder order) {
+  CHECK_ERR(requireNaturalAtomicAlign(align, bytes));
   Load curr;
   curr.memory = mem;
   CHECK_ERR(visitLoad(&curr));
@@ -1643,8 +1655,13 @@ Result<> IRBuilder::makeAtomicLoad(
   return Ok{};
 }
 
-Result<> IRBuilder::makeAtomicStore(
-  unsigned bytes, Address offset, Type type, Name mem, MemoryOrder order) {
+Result<> IRBuilder::makeAtomicStore(unsigned bytes,
+                                    Address offset,
+                                    Address align,
+                                    Type type,
+                                    Name mem,
+                                    MemoryOrder order) {
+  CHECK_ERR(requireNaturalAtomicAlign(align, bytes));
   Store curr;
   curr.memory = mem;
   curr.valueType = type;
@@ -1657,9 +1674,11 @@ Result<> IRBuilder::makeAtomicStore(
 Result<> IRBuilder::makeAtomicRMW(AtomicRMWOp op,
                                   unsigned bytes,
                                   Address offset,
+                                  Address align,
                                   Type type,
                                   Name mem,
                                   MemoryOrder order) {
+  CHECK_ERR(requireNaturalAtomicAlign(align, bytes));
   AtomicRMW curr;
   curr.memory = mem;
   curr.type = type;
@@ -1669,8 +1688,13 @@ Result<> IRBuilder::makeAtomicRMW(AtomicRMWOp op,
   return Ok{};
 }
 
-Result<> IRBuilder::makeAtomicCmpxchg(
-  unsigned bytes, Address offset, Type type, Name mem, MemoryOrder order) {
+Result<> IRBuilder::makeAtomicCmpxchg(unsigned bytes,
+                                      Address offset,
+                                      Address align,
+                                      Type type,
+                                      Name mem,
+                                      MemoryOrder order) {
+  CHECK_ERR(requireNaturalAtomicAlign(align, bytes));
   AtomicCmpxchg curr;
   curr.memory = mem;
   CHECK_ERR(ChildPopper{*this}.visitAtomicCmpxchg(&curr, type));
@@ -1685,7 +1709,9 @@ Result<> IRBuilder::makeAtomicCmpxchg(
   return Ok{};
 }
 
-Result<> IRBuilder::makeAtomicWait(Type type, Address offset, Name mem) {
+Result<>
+IRBuilder::makeAtomicWait(Type type, Address offset, Address align, Name mem) {
+  CHECK_ERR(requireNaturalAtomicAlign(align, type == Type::i32 ? 4 : 8));
   AtomicWait curr;
   curr.memory = mem;
   curr.expectedType = type;
@@ -1695,7 +1721,8 @@ Result<> IRBuilder::makeAtomicWait(Type type, Address offset, Name mem) {
   return Ok{};
 }
 
-Result<> IRBuilder::makeAtomicNotify(Address offset, Name mem) {
+Result<> IRBuilder::makeAtomicNotify(Address offset, Address align, Name mem) {
+  CHECK_ERR(requireNaturalAtomicAlign(align, 4));
   AtomicNotify curr;
   curr.memory = mem;
   CHECK_ERR(visitAtomicNotify(&curr));
diff --git a/src/wasm/wasm-stack.cpp b/src/wasm/wasm-stack.cpp
index 5f1c6a13e8d..29d9a38c15b 100644
--- a/src/wasm/wasm-stack.cpp
+++ b/src/wasm/wasm-stack.cpp
@@ -608,14 +608,22 @@ void BinaryInstWriter::visitAtomicWait(AtomicWait* curr) {
   switch (curr->expectedType.getBasic()) {
     case Type::i32: {
       o << static_cast<int8_t>(BinaryConsts::I32AtomicWait);
-      emitMemoryAccess(
-        4, 4, curr->offset, curr->memory, MemoryOrder::SeqCst, /*isRMW=*/false);
+      emitMemoryAccess(4,
+                       4,
+                       curr->offset,
+                       curr->memory,
+                       MemoryOrder::SeqCst,
+                       /*isRMW=*/false);
       break;
     }
     case Type::i64: {
       o << static_cast<int8_t>(BinaryConsts::I64AtomicWait);
-      emitMemoryAccess(
-        8, 8, curr->offset, curr->memory, MemoryOrder::SeqCst, /*isRMW=*/false);
+      emitMemoryAccess(8,
+                       8,
+                       curr->offset,
+                       curr->memory,
+                       MemoryOrder::SeqCst,
+                       /*isRMW=*/false);
       break;
     }
     default:
@@ -626,8 +634,12 @@ void BinaryInstWriter::visitAtomicWait(AtomicWait* curr) {
 void BinaryInstWriter::visitAtomicNotify(AtomicNotify* curr) {
   o << static_cast<int8_t>(BinaryConsts::AtomicPrefix)
     << static_cast<int8_t>(BinaryConsts::AtomicNotify);
-  emitMemoryAccess(
-    4, 4, curr->offset, curr->memory, MemoryOrder::SeqCst, /*isRMW=*/false);
+  emitMemoryAccess(4,
+                   4,
+                   curr->offset,
+                   curr->memory,
+                   MemoryOrder::SeqCst,
+                   /*isRMW=*/false);
 }
 
 void BinaryInstWriter::visitAtomicFence(AtomicFence* curr) {
diff --git a/test/lit/basic/relaxed-atomics.wast b/test/lit/basic/relaxed-atomics.wast
index 0484c8465b8..c9994e43d94 100644
--- a/test/lit/basic/relaxed-atomics.wast
+++ b/test/lit/basic/relaxed-atomics.wast
@@ -8,21 +8,21 @@
  ;; RTRIP:      (func $acqrel (type $0)
  ;; RTRIP-NEXT:  (atomic.fence acqrel)
  ;; RTRIP-NEXT:  (i32.atomic.store acqrel
- ;; RTRIP-NEXT:   (i32.const 1)
+ ;; RTRIP-NEXT:   (i32.const 0)
  ;; RTRIP-NEXT:   (i32.const 1)
  ;; RTRIP-NEXT:  )
  ;; RTRIP-NEXT:  (drop
  ;; RTRIP-NEXT:   (i32.atomic.load acqrel
- ;; RTRIP-NEXT:    (i32.const 1)
+ ;; RTRIP-NEXT:    (i32.const 0)
  ;; RTRIP-NEXT:   )
  ;; RTRIP-NEXT:  )
  ;; RTRIP-NEXT: )
  (func $acqrel
    (atomic.fence acqrel)
-   (i32.atomic.store acqrel (i32.const 1) (i32.const 1))
+   (i32.atomic.store acqrel (i32.const 0) (i32.const 1))
    (drop
     (i32.atomic.load acqrel
-     (i32.const 1)
+     (i32.const 0)
    ))
  )
 
@@ -30,56 +30,56 @@
  ;; RTRIP:      (func $seqcst (type $0)
  ;; RTRIP-NEXT:  (atomic.fence)
  ;; RTRIP-NEXT:  (i32.atomic.store
- ;; RTRIP-NEXT:   (i32.const 1)
+ ;; RTRIP-NEXT:   (i32.const 0)
  ;; RTRIP-NEXT:   (i32.const 1)
  ;; RTRIP-NEXT:  )
  ;; RTRIP-NEXT:  (i32.atomic.store
- ;; RTRIP-NEXT:   (i32.const 1)
+ ;; RTRIP-NEXT:   (i32.const 0)
  ;; RTRIP-NEXT:   (i32.const 1)
  ;; RTRIP-NEXT:  )
  ;; RTRIP-NEXT:  (drop
  ;; RTRIP-NEXT:   (i32.atomic.load
- ;; RTRIP-NEXT:    (i32.const 1)
+ ;; RTRIP-NEXT:    (i32.const 0)
  ;; RTRIP-NEXT:   )
  ;; RTRIP-NEXT:  )
  ;; RTRIP-NEXT:  (drop
  ;; RTRIP-NEXT:   (i32.atomic.load
- ;; RTRIP-NEXT:    (i32.const 1)
+ ;; RTRIP-NEXT:    (i32.const 0)
  ;; RTRIP-NEXT:   )
  ;; RTRIP-NEXT:  )
  ;; RTRIP-NEXT: )
  (func $seqcst
    (atomic.fence seqcst)
-   (i32.atomic.store seqcst (i32.const 1) (i32.const 1))
-   (i32.atomic.store 0 seqcst (i32.const 1) (i32.const 1))
+   (i32.atomic.store seqcst (i32.const 0) (i32.const 1))
+   (i32.atomic.store 0 seqcst (i32.const 0) (i32.const 1))
    (drop (i32.atomic.load seqcst
-    (i32.const 1)
+    (i32.const 0)
    ))
    ;; allows memory index before memory ordering immediate
    (drop
     (i32.atomic.load 0 seqcst
-    (i32.const 1)
+    (i32.const 0)
    ))
  )
 
  ;; RTRIP:      (func $relaxed (type $0)
  ;; RTRIP-NEXT:  (atomic.fence relaxed)
  ;; RTRIP-NEXT:  (i32.atomic.store relaxed
- ;; RTRIP-NEXT:   (i32.const 1)
+ ;; RTRIP-NEXT:   (i32.const 0)
  ;; RTRIP-NEXT:   (i32.const 1)
  ;; RTRIP-NEXT:  )
  ;; RTRIP-NEXT:  (drop
  ;; RTRIP-NEXT:   (i32.atomic.load relaxed
- ;; RTRIP-NEXT:    (i32.const 1)
+ ;; RTRIP-NEXT:    (i32.const 0)
  ;; RTRIP-NEXT:   )
  ;; RTRIP-NEXT:  )
  ;; RTRIP-NEXT: )
  (func $relaxed
    (atomic.fence relaxed)
-   (i32.atomic.store relaxed (i32.const 1) (i32.const 1))
+   (i32.atomic.store relaxed (i32.const 0) (i32.const 1))
    (drop
     (i32.atomic.load relaxed
-     (i32.const 1)
+     (i32.const 0)
     )
    )
  )
diff --git a/test/lit/passes/dealign-atomics.wast b/test/lit/passes/dealign-atomics.wast
new file mode 100644
index 00000000000..3bf612d2f0b
--- /dev/null
+++ b/test/lit/passes/dealign-atomics.wast
@@ -0,0 +1,19 @@
+;; RUN: wasm-opt %s --enable-threads --dealign -S -o - | filecheck %s
+
+(module
+  (memory 1 1 shared)
+
+  (func $test
+    (drop (i32.load align=4 (i32.const 0)))
+    (drop (i32.atomic.load (i32.const 4)))
+    (i32.store align=4 (i32.const 8) (i32.const 0))
+    (i32.atomic.store (i32.const 12) (i32.const 0))
+  )
+)
+
+;; CHECK: (i32.load align=1
+;; CHECK: (i32.atomic.load
+;; CHECK-NOT: i32.atomic.load align=1
+;; CHECK: (i32.store align=1
+;; CHECK: (i32.atomic.store
+;; CHECK-NOT: i32.atomic.store align=1
diff --git a/test/lit/validation/atomic-alignment.wast b/test/lit/validation/atomic-alignment.wast
new file mode 100644
index 00000000000..0b424259282
--- /dev/null
+++ b/test/lit/validation/atomic-alignment.wast
@@ -0,0 +1,59 @@
+;; Non-natural alignment on atomic memory ops is a parse error.
+
+;; RUN: foreach %s %t not wasm-opt --enable-threads -o /dev/null 2>&1 | filecheck %s
+
+;; CHECK: Fatal: {{.*}}: error: atomic accesses must have natural alignment
+(module
+  (memory 1 1 shared)
+  (func (result i32)
+    (i32.atomic.load align=1 (i32.const 0)))
+)
+
+;; CHECK: Fatal: {{.*}}: error: atomic accesses must have natural alignment
+(module
+  (memory 1 1 shared)
+  (func
+    (i32.atomic.store align=2 (i32.const 0) (i32.const 0)))
+)
+
+;; CHECK: Fatal: {{.*}}: error: atomic accesses must have natural alignment
+(module
+  (memory 1 1 shared)
+  (func (result i32)
+    (i32.atomic.rmw.add align=1 (i32.const 0) (i32.const 0)))
+)
+
+;; CHECK: Fatal: {{.*}}: error: atomic accesses must have natural alignment
+(module
+  (memory 1 1 shared)
+  (func (result i32)
+    (i32.atomic.rmw.cmpxchg align=1 (i32.const 0) (i32.const 0) (i32.const 0)))
+)
+
+;; CHECK: Fatal: {{.*}}: error: atomic accesses must have natural alignment
+(module
+  (memory 1 1 shared)
+  (func (result i32)
+    (memory.atomic.wait32 align=1 (i32.const 0) (i32.const 0) (i64.const 0)))
+)
+
+;; CHECK: Fatal: {{.*}}: error: atomic accesses must have natural alignment
+(module
+  (memory 1 1 shared)
+  (func (result i32)
+    (memory.atomic.wait64 align=4 (i32.const 0) (i64.const 0) (i64.const 0)))
+)
+
+;; CHECK: Fatal: {{.*}}: error: atomic accesses must have natural alignment
+(module
+  (memory 1 1 shared)
+  (func (result i32)
+    (memory.atomic.notify align=1 (i32.const 0) (i32.const 0)))
+)
+
+;; CHECK: Fatal: {{.*}}: error: atomic accesses must have natural alignment
+(module
+  (memory 1 1 shared)
+  (func (result i64)
+    (i64.atomic.load32_u align=8 (i32.const 0)))
+)
diff --git a/test/lit/validation/relaxed-atomics.wast b/test/lit/validation/relaxed-atomics.wast
index aa316cda94a..5f419190fe2 100644
--- a/test/lit/validation/relaxed-atomics.wast
+++ b/test/lit/validation/relaxed-atomics.wast
@@ -14,7 +14,7 @@
   (func $relaxed (result i32)
     ;; CHECK: Relaxed operations require relaxed atomics [--enable-relaxed-atomics]
     (i32.atomic.load relaxed
-      (i32.const 1)
+      (i32.const 0)
     )
   )
 )
diff --git a/test/spec/acquire-release-atomics/basic.wast b/test/spec/acquire-release-atomics/basic.wast
index a480b91e3ff..81493735143 100644
--- a/test/spec/acquire-release-atomics/basic.wast
+++ b/test/spec/acquire-release-atomics/basic.wast
@@ -731,34 +731,34 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\12" ;; i32.atomic.load8_u
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\12" ;; i32.atomic.load8_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\12" ;; i32.atomic.load8_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\12" ;; i32.atomic.load8_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\12" ;; i32.atomic.load8_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -766,7 +766,7 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\12" ;; i32.atomic.load8_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -774,14 +774,14 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\12" ;; i32.atomic.load8_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\42\00" ;; (i64.const 0)
     "\fe\12" ;; i32.atomic.load8_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -789,7 +789,7 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\12" ;; i32.atomic.load8_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -797,34 +797,34 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\13" ;; i32.atomic.load16_u
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\13" ;; i32.atomic.load16_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\13" ;; i32.atomic.load16_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\13" ;; i32.atomic.load16_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\13" ;; i32.atomic.load16_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -832,7 +832,7 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\13" ;; i32.atomic.load16_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -840,14 +840,14 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\13" ;; i32.atomic.load16_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\42\00" ;; (i64.const 0)
     "\fe\13" ;; i32.atomic.load16_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -855,7 +855,7 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\13" ;; i32.atomic.load16_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -863,34 +863,34 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\14" ;; i64.atomic.load8_u
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\14" ;; i64.atomic.load8_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\14" ;; i64.atomic.load8_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\14" ;; i64.atomic.load8_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\14" ;; i64.atomic.load8_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -898,7 +898,7 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\14" ;; i64.atomic.load8_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -906,14 +906,14 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\14" ;; i64.atomic.load8_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\42\00" ;; (i64.const 0)
     "\fe\14" ;; i64.atomic.load8_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -921,7 +921,7 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\14" ;; i64.atomic.load8_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -929,34 +929,34 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\15" ;; i64.atomic.load16_u
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\15" ;; i64.atomic.load16_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\15" ;; i64.atomic.load16_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\15" ;; i64.atomic.load16_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\15" ;; i64.atomic.load16_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -964,7 +964,7 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\15" ;; i64.atomic.load16_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -972,14 +972,14 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\15" ;; i64.atomic.load16_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\42\00" ;; (i64.const 0)
     "\fe\15" ;; i64.atomic.load16_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -987,7 +987,7 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\15" ;; i64.atomic.load16_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -995,34 +995,34 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\16" ;; i64.atomic.load32_u
-    "\03" ;; Alignment of 3
+    "\02" ;; Alignment of 2
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\16" ;; i64.atomic.load32_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\16" ;; i64.atomic.load32_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\16" ;; i64.atomic.load32_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\fe\16" ;; i64.atomic.load32_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1030,7 +1030,7 @@
 
     "\41\00" ;; (i32.const 0)
     "\fe\16" ;; i64.atomic.load32_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1038,14 +1038,14 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\16" ;; i64.atomic.load32_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
 
     "\42\00" ;; (i64.const 0)
     "\fe\16" ;; i64.atomic.load32_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1053,7 +1053,7 @@
 
     "\42\00" ;; (i64.const 0)
     "\fe\16" ;; i64.atomic.load32_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1194,34 +1194,34 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\19" ;; i32.atomic.store8
-    "\02" ;; Alignment of 2
+    "\00" ;; Alignment of 0
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\19" ;; i32.atomic.store8
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\19" ;; i32.atomic.store8
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\19" ;; i32.atomic.store8
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\19" ;; i32.atomic.store8
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1229,7 +1229,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\19" ;; i32.atomic.store8
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1237,14 +1237,14 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\19" ;; i32.atomic.store8
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
 
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\19" ;; i32.atomic.store8
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1252,7 +1252,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\19" ;; i32.atomic.store8
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1260,34 +1260,34 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\1a" ;; i32.atomic.store16
-    "\02" ;; Alignment of 2
+    "\01" ;; Alignment of 1
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\1a" ;; i32.atomic.store16
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\1a" ;; i32.atomic.store16
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\1a" ;; i32.atomic.store16
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\1a" ;; i32.atomic.store16
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1295,7 +1295,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\1a" ;; i32.atomic.store16
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1303,14 +1303,14 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\1a" ;; i32.atomic.store16
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
 
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\1a" ;; i32.atomic.store16
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1318,7 +1318,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\1a" ;; i32.atomic.store16
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1326,34 +1326,34 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1b" ;; i64.atomic.store8
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1b" ;; i64.atomic.store8
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1b" ;; i64.atomic.store8
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1b" ;; i64.atomic.store8
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1b" ;; i64.atomic.store8
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1361,7 +1361,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1b" ;; i64.atomic.store8
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1369,14 +1369,14 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1b" ;; i64.atomic.store8
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
 
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1b" ;; i64.atomic.store8
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1384,7 +1384,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1b" ;; i64.atomic.store8
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1392,34 +1392,34 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1c" ;; i64.atomic.store16
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1c" ;; i64.atomic.store16
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1c" ;; i64.atomic.store16
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1c" ;; i64.atomic.store16
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1c" ;; i64.atomic.store16
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1427,7 +1427,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1c" ;; i64.atomic.store16
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1435,14 +1435,14 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1c" ;; i64.atomic.store16
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
 
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1c" ;; i64.atomic.store16
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1450,7 +1450,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1c" ;; i64.atomic.store16
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1458,34 +1458,34 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1d" ;; i64.atomic.store32
-    "\03" ;; Alignment of 3
+    "\02" ;; Alignment of 2
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1d" ;; i64.atomic.store32
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1d" ;; i64.atomic.store32
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1d" ;; i64.atomic.store32
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1d" ;; i64.atomic.store32
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1493,7 +1493,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1d" ;; i64.atomic.store32
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1501,14 +1501,14 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1d" ;; i64.atomic.store32
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
 
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1d" ;; i64.atomic.store32
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\01" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1516,7 +1516,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\1d" ;; i64.atomic.store32
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1674,14 +1674,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\20" ;; i32.atomic.rmw8.add_u
-    "\02" ;; Alignment of 2
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\20" ;; i32.atomic.rmw8.add_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1689,7 +1689,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\20" ;; i32.atomic.rmw8.add_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1697,7 +1697,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\20" ;; i32.atomic.rmw8.add_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -1705,7 +1705,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\20" ;; i32.atomic.rmw8.add_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1714,7 +1714,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\20" ;; i32.atomic.rmw8.add_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1723,7 +1723,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\20" ;; i32.atomic.rmw8.add_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -1731,7 +1731,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\20" ;; i32.atomic.rmw8.add_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1740,7 +1740,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\20" ;; i32.atomic.rmw8.add_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1749,14 +1749,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\21" ;; i32.atomic.rmw16.add_u
-    "\02" ;; Alignment of 2
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\21" ;; i32.atomic.rmw16.add_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1764,7 +1764,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\21" ;; i32.atomic.rmw16.add_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1772,7 +1772,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\21" ;; i32.atomic.rmw16.add_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -1780,7 +1780,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\21" ;; i32.atomic.rmw16.add_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1789,7 +1789,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\21" ;; i32.atomic.rmw16.add_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1798,7 +1798,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\21" ;; i32.atomic.rmw16.add_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -1806,7 +1806,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\21" ;; i32.atomic.rmw16.add_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1815,7 +1815,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\21" ;; i32.atomic.rmw16.add_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1824,14 +1824,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\22" ;; i64.atomic.rmw8.add_u
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\22" ;; i64.atomic.rmw8.add_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1839,7 +1839,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\22" ;; i64.atomic.rmw8.add_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1847,7 +1847,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\22" ;; i64.atomic.rmw8.add_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -1855,7 +1855,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\22" ;; i64.atomic.rmw8.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1864,7 +1864,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\22" ;; i64.atomic.rmw8.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1873,7 +1873,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\22" ;; i64.atomic.rmw8.add_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -1881,7 +1881,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\22" ;; i64.atomic.rmw8.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1890,7 +1890,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\22" ;; i64.atomic.rmw8.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1899,14 +1899,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\23" ;; i64.atomic.rmw16.add_u
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\23" ;; i64.atomic.rmw16.add_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1914,7 +1914,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\23" ;; i64.atomic.rmw16.add_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1922,7 +1922,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\23" ;; i64.atomic.rmw16.add_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -1930,7 +1930,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\23" ;; i64.atomic.rmw16.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1939,7 +1939,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\23" ;; i64.atomic.rmw16.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1948,7 +1948,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\23" ;; i64.atomic.rmw16.add_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -1956,7 +1956,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\23" ;; i64.atomic.rmw16.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -1965,7 +1965,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\23" ;; i64.atomic.rmw16.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -1974,14 +1974,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\24" ;; i64.atomic.rmw32.add_u
-    "\03" ;; Alignment of 3
+    "\02" ;; Alignment of 2
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\24" ;; i64.atomic.rmw32.add_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1989,7 +1989,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\24" ;; i64.atomic.rmw32.add_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -1997,7 +1997,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\24" ;; i64.atomic.rmw32.add_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2005,7 +2005,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\24" ;; i64.atomic.rmw32.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2014,7 +2014,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\24" ;; i64.atomic.rmw32.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2023,7 +2023,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\24" ;; i64.atomic.rmw32.add_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2031,7 +2031,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\24" ;; i64.atomic.rmw32.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2040,7 +2040,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\24" ;; i64.atomic.rmw32.add_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2199,14 +2199,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\27" ;; i32.atomic.rmw8.sub_u
-    "\02" ;; Alignment of 2
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\27" ;; i32.atomic.rmw8.sub_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2214,7 +2214,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\27" ;; i32.atomic.rmw8.sub_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2222,7 +2222,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\27" ;; i32.atomic.rmw8.sub_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2230,7 +2230,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\27" ;; i32.atomic.rmw8.sub_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2239,7 +2239,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\27" ;; i32.atomic.rmw8.sub_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2248,7 +2248,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\27" ;; i32.atomic.rmw8.sub_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2256,7 +2256,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\27" ;; i32.atomic.rmw8.sub_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2265,7 +2265,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\27" ;; i32.atomic.rmw8.sub_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2274,14 +2274,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\28" ;; i32.atomic.rmw16.sub_u
-    "\02" ;; Alignment of 2
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\28" ;; i32.atomic.rmw16.sub_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2289,7 +2289,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\28" ;; i32.atomic.rmw16.sub_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2297,7 +2297,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\28" ;; i32.atomic.rmw16.sub_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2305,7 +2305,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\28" ;; i32.atomic.rmw16.sub_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2314,7 +2314,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\28" ;; i32.atomic.rmw16.sub_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2323,7 +2323,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\28" ;; i32.atomic.rmw16.sub_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2331,7 +2331,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\28" ;; i32.atomic.rmw16.sub_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2340,7 +2340,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\28" ;; i32.atomic.rmw16.sub_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2349,14 +2349,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\29" ;; i64.atomic.rmw8.sub_u
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\29" ;; i64.atomic.rmw8.sub_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2364,7 +2364,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\29" ;; i64.atomic.rmw8.sub_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2372,7 +2372,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\29" ;; i64.atomic.rmw8.sub_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2380,7 +2380,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\29" ;; i64.atomic.rmw8.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2389,7 +2389,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\29" ;; i64.atomic.rmw8.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2398,7 +2398,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\29" ;; i64.atomic.rmw8.sub_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2406,7 +2406,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\29" ;; i64.atomic.rmw8.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2415,7 +2415,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\29" ;; i64.atomic.rmw8.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2424,14 +2424,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2a" ;; i64.atomic.rmw16.sub_u
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2a" ;; i64.atomic.rmw16.sub_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2439,7 +2439,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2a" ;; i64.atomic.rmw16.sub_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2447,7 +2447,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2a" ;; i64.atomic.rmw16.sub_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2455,7 +2455,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2a" ;; i64.atomic.rmw16.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2464,7 +2464,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2a" ;; i64.atomic.rmw16.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2473,7 +2473,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2a" ;; i64.atomic.rmw16.sub_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2481,7 +2481,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2a" ;; i64.atomic.rmw16.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2490,7 +2490,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2a" ;; i64.atomic.rmw16.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2499,14 +2499,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2b" ;; i64.atomic.rmw32.sub_u
-    "\03" ;; Alignment of 3
+    "\02" ;; Alignment of 2
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2b" ;; i64.atomic.rmw32.sub_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2514,7 +2514,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2b" ;; i64.atomic.rmw32.sub_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2522,7 +2522,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2b" ;; i64.atomic.rmw32.sub_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2530,7 +2530,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2b" ;; i64.atomic.rmw32.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2539,7 +2539,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2b" ;; i64.atomic.rmw32.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2548,7 +2548,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2b" ;; i64.atomic.rmw32.sub_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2556,7 +2556,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2b" ;; i64.atomic.rmw32.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2565,7 +2565,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\2b" ;; i64.atomic.rmw32.sub_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2724,14 +2724,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2e" ;; i32.atomic.rmw8.and_u
-    "\02" ;; Alignment of 2
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2e" ;; i32.atomic.rmw8.and_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2739,7 +2739,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2e" ;; i32.atomic.rmw8.and_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2747,7 +2747,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2e" ;; i32.atomic.rmw8.and_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2755,7 +2755,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2e" ;; i32.atomic.rmw8.and_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2764,7 +2764,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2e" ;; i32.atomic.rmw8.and_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2773,7 +2773,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2e" ;; i32.atomic.rmw8.and_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2781,7 +2781,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2e" ;; i32.atomic.rmw8.and_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2790,7 +2790,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2e" ;; i32.atomic.rmw8.and_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2799,14 +2799,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2f" ;; i32.atomic.rmw16.and_u
-    "\02" ;; Alignment of 2
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2f" ;; i32.atomic.rmw16.and_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2814,7 +2814,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2f" ;; i32.atomic.rmw16.and_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2822,7 +2822,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2f" ;; i32.atomic.rmw16.and_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2830,7 +2830,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2f" ;; i32.atomic.rmw16.and_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2839,7 +2839,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2f" ;; i32.atomic.rmw16.and_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2848,7 +2848,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2f" ;; i32.atomic.rmw16.and_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2856,7 +2856,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2f" ;; i32.atomic.rmw16.and_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2865,7 +2865,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\2f" ;; i32.atomic.rmw16.and_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2874,14 +2874,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\30" ;; i64.atomic.rmw8.and_u
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\30" ;; i64.atomic.rmw8.and_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2889,7 +2889,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\30" ;; i64.atomic.rmw8.and_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2897,7 +2897,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\30" ;; i64.atomic.rmw8.and_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2905,7 +2905,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\30" ;; i64.atomic.rmw8.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2914,7 +2914,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\30" ;; i64.atomic.rmw8.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2923,7 +2923,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\30" ;; i64.atomic.rmw8.and_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2931,7 +2931,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\30" ;; i64.atomic.rmw8.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2940,7 +2940,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\30" ;; i64.atomic.rmw8.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2949,14 +2949,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\31" ;; i64.atomic.rmw16.and_u
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\31" ;; i64.atomic.rmw16.and_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2964,7 +2964,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\31" ;; i64.atomic.rmw16.and_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -2972,7 +2972,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\31" ;; i64.atomic.rmw16.and_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -2980,7 +2980,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\31" ;; i64.atomic.rmw16.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -2989,7 +2989,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\31" ;; i64.atomic.rmw16.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -2998,7 +2998,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\31" ;; i64.atomic.rmw16.and_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3006,7 +3006,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\31" ;; i64.atomic.rmw16.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3015,7 +3015,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\31" ;; i64.atomic.rmw16.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3024,14 +3024,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\32" ;; i64.atomic.rmw32.and_u
-    "\03" ;; Alignment of 3
+    "\02" ;; Alignment of 2
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\32" ;; i64.atomic.rmw32.and_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3039,7 +3039,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\32" ;; i64.atomic.rmw32.and_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3047,7 +3047,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\32" ;; i64.atomic.rmw32.and_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3055,7 +3055,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\32" ;; i64.atomic.rmw32.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3064,7 +3064,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\32" ;; i64.atomic.rmw32.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3073,7 +3073,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\32" ;; i64.atomic.rmw32.and_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3081,7 +3081,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\32" ;; i64.atomic.rmw32.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3090,7 +3090,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\32" ;; i64.atomic.rmw32.and_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3249,14 +3249,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\35" ;; i32.atomic.rmw8.or_u
-    "\02" ;; Alignment of 2
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\35" ;; i32.atomic.rmw8.or_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3264,7 +3264,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\35" ;; i32.atomic.rmw8.or_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3272,7 +3272,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\35" ;; i32.atomic.rmw8.or_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3280,7 +3280,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\35" ;; i32.atomic.rmw8.or_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3289,7 +3289,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\35" ;; i32.atomic.rmw8.or_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3298,7 +3298,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\35" ;; i32.atomic.rmw8.or_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3306,7 +3306,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\35" ;; i32.atomic.rmw8.or_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3315,7 +3315,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\35" ;; i32.atomic.rmw8.or_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3324,14 +3324,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\36" ;; i32.atomic.rmw16.or_u
-    "\02" ;; Alignment of 2
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\36" ;; i32.atomic.rmw16.or_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3339,7 +3339,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\36" ;; i32.atomic.rmw16.or_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3347,7 +3347,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\36" ;; i32.atomic.rmw16.or_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3355,7 +3355,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\36" ;; i32.atomic.rmw16.or_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3364,7 +3364,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\36" ;; i32.atomic.rmw16.or_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3373,7 +3373,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\36" ;; i32.atomic.rmw16.or_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3381,7 +3381,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\36" ;; i32.atomic.rmw16.or_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3390,7 +3390,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\36" ;; i32.atomic.rmw16.or_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3399,14 +3399,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\37" ;; i64.atomic.rmw8.or_u
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\37" ;; i64.atomic.rmw8.or_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3414,7 +3414,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\37" ;; i64.atomic.rmw8.or_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3422,7 +3422,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\37" ;; i64.atomic.rmw8.or_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3430,7 +3430,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\37" ;; i64.atomic.rmw8.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3439,7 +3439,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\37" ;; i64.atomic.rmw8.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3448,7 +3448,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\37" ;; i64.atomic.rmw8.or_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3456,7 +3456,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\37" ;; i64.atomic.rmw8.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3465,7 +3465,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\37" ;; i64.atomic.rmw8.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3474,14 +3474,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\38" ;; i64.atomic.rmw16.or_u
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\38" ;; i64.atomic.rmw16.or_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3489,7 +3489,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\38" ;; i64.atomic.rmw16.or_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3497,7 +3497,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\38" ;; i64.atomic.rmw16.or_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3505,7 +3505,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\38" ;; i64.atomic.rmw16.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3514,7 +3514,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\38" ;; i64.atomic.rmw16.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3523,7 +3523,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\38" ;; i64.atomic.rmw16.or_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3531,7 +3531,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\38" ;; i64.atomic.rmw16.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3540,7 +3540,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\38" ;; i64.atomic.rmw16.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3549,14 +3549,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\39" ;; i64.atomic.rmw32.or_u
-    "\03" ;; Alignment of 3
+    "\02" ;; Alignment of 2
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\39" ;; i64.atomic.rmw32.or_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3564,7 +3564,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\39" ;; i64.atomic.rmw32.or_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3572,7 +3572,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\39" ;; i64.atomic.rmw32.or_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3580,7 +3580,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\39" ;; i64.atomic.rmw32.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3589,7 +3589,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\39" ;; i64.atomic.rmw32.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3598,7 +3598,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\39" ;; i64.atomic.rmw32.or_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3606,7 +3606,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\39" ;; i64.atomic.rmw32.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3615,7 +3615,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\39" ;; i64.atomic.rmw32.or_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3774,14 +3774,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3c" ;; i32.atomic.rmw8.xor_u
-    "\02" ;; Alignment of 2
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3c" ;; i32.atomic.rmw8.xor_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3789,7 +3789,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3c" ;; i32.atomic.rmw8.xor_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3797,7 +3797,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3c" ;; i32.atomic.rmw8.xor_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3805,7 +3805,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3c" ;; i32.atomic.rmw8.xor_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3814,7 +3814,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3c" ;; i32.atomic.rmw8.xor_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3823,7 +3823,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3c" ;; i32.atomic.rmw8.xor_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3831,7 +3831,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3c" ;; i32.atomic.rmw8.xor_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3840,7 +3840,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3c" ;; i32.atomic.rmw8.xor_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3849,14 +3849,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3d" ;; i32.atomic.rmw16.xor_u
-    "\02" ;; Alignment of 2
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3d" ;; i32.atomic.rmw16.xor_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3864,7 +3864,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3d" ;; i32.atomic.rmw16.xor_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3872,7 +3872,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3d" ;; i32.atomic.rmw16.xor_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3880,7 +3880,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3d" ;; i32.atomic.rmw16.xor_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3889,7 +3889,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3d" ;; i32.atomic.rmw16.xor_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3898,7 +3898,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3d" ;; i32.atomic.rmw16.xor_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3906,7 +3906,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3d" ;; i32.atomic.rmw16.xor_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3915,7 +3915,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\3d" ;; i32.atomic.rmw16.xor_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3924,14 +3924,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3e" ;; i64.atomic.rmw8.xor_u
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3e" ;; i64.atomic.rmw8.xor_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3939,7 +3939,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3e" ;; i64.atomic.rmw8.xor_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -3947,7 +3947,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3e" ;; i64.atomic.rmw8.xor_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3955,7 +3955,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3e" ;; i64.atomic.rmw8.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3964,7 +3964,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3e" ;; i64.atomic.rmw8.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3973,7 +3973,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3e" ;; i64.atomic.rmw8.xor_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -3981,7 +3981,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3e" ;; i64.atomic.rmw8.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -3990,7 +3990,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3e" ;; i64.atomic.rmw8.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -3999,14 +3999,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3f" ;; i64.atomic.rmw16.xor_u
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3f" ;; i64.atomic.rmw16.xor_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4014,7 +4014,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3f" ;; i64.atomic.rmw16.xor_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4022,7 +4022,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3f" ;; i64.atomic.rmw16.xor_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4030,7 +4030,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3f" ;; i64.atomic.rmw16.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4039,7 +4039,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3f" ;; i64.atomic.rmw16.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4048,7 +4048,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3f" ;; i64.atomic.rmw16.xor_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4056,7 +4056,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3f" ;; i64.atomic.rmw16.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4065,7 +4065,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\3f" ;; i64.atomic.rmw16.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4074,14 +4074,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\40" ;; i64.atomic.rmw32.xor_u
-    "\03" ;; Alignment of 3
+    "\02" ;; Alignment of 2
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\40" ;; i64.atomic.rmw32.xor_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4089,7 +4089,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\40" ;; i64.atomic.rmw32.xor_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4097,7 +4097,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\40" ;; i64.atomic.rmw32.xor_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4105,7 +4105,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\40" ;; i64.atomic.rmw32.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4114,7 +4114,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\40" ;; i64.atomic.rmw32.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4123,7 +4123,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\40" ;; i64.atomic.rmw32.xor_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4131,7 +4131,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\40" ;; i64.atomic.rmw32.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4140,7 +4140,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\40" ;; i64.atomic.rmw32.xor_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4299,14 +4299,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\43" ;; i32.atomic.rmw8.xchg_u
-    "\02" ;; Alignment of 2
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\43" ;; i32.atomic.rmw8.xchg_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4314,7 +4314,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\43" ;; i32.atomic.rmw8.xchg_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4322,7 +4322,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\43" ;; i32.atomic.rmw8.xchg_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4330,7 +4330,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\43" ;; i32.atomic.rmw8.xchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4339,7 +4339,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\43" ;; i32.atomic.rmw8.xchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4348,7 +4348,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\43" ;; i32.atomic.rmw8.xchg_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4356,7 +4356,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\43" ;; i32.atomic.rmw8.xchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4365,7 +4365,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\43" ;; i32.atomic.rmw8.xchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4374,14 +4374,14 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\44" ;; i32.atomic.rmw16.xchg_u
-    "\02" ;; Alignment of 2
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\44" ;; i32.atomic.rmw16.xchg_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4389,7 +4389,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\44" ;; i32.atomic.rmw16.xchg_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4397,7 +4397,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\44" ;; i32.atomic.rmw16.xchg_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4405,7 +4405,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\44" ;; i32.atomic.rmw16.xchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4414,7 +4414,7 @@
     "\41\00" ;; (i32.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\44" ;; i32.atomic.rmw16.xchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4423,7 +4423,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\44" ;; i32.atomic.rmw16.xchg_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4431,7 +4431,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\44" ;; i32.atomic.rmw16.xchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4440,7 +4440,7 @@
     "\42\00" ;; (i64.const 0)
     "\41\33" ;; (i32.const 51)
     "\fe\44" ;; i32.atomic.rmw16.xchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4449,14 +4449,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\45" ;; i64.atomic.rmw8.xchg_u
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\45" ;; i64.atomic.rmw8.xchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4464,7 +4464,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\45" ;; i64.atomic.rmw8.xchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4472,7 +4472,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\45" ;; i64.atomic.rmw8.xchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4480,7 +4480,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\45" ;; i64.atomic.rmw8.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4489,7 +4489,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\45" ;; i64.atomic.rmw8.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4498,7 +4498,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\45" ;; i64.atomic.rmw8.xchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4506,7 +4506,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\45" ;; i64.atomic.rmw8.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4515,7 +4515,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\45" ;; i64.atomic.rmw8.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4524,14 +4524,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\46" ;; i64.atomic.rmw16.xchg_u
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\46" ;; i64.atomic.rmw16.xchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4539,7 +4539,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\46" ;; i64.atomic.rmw16.xchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4547,7 +4547,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\46" ;; i64.atomic.rmw16.xchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4555,7 +4555,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\46" ;; i64.atomic.rmw16.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4564,7 +4564,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\46" ;; i64.atomic.rmw16.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4573,7 +4573,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\46" ;; i64.atomic.rmw16.xchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4581,7 +4581,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\46" ;; i64.atomic.rmw16.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4590,7 +4590,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\46" ;; i64.atomic.rmw16.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4599,14 +4599,14 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\47" ;; i64.atomic.rmw32.xchg_u
-    "\03" ;; Alignment of 3
+    "\02" ;; Alignment of 2
     "\00" ;; offset
     "\1a" ;; drop
 
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\47" ;; i64.atomic.rmw32.xchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4614,7 +4614,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\47" ;; i64.atomic.rmw32.xchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4622,7 +4622,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\47" ;; i64.atomic.rmw32.xchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4630,7 +4630,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\47" ;; i64.atomic.rmw32.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4639,7 +4639,7 @@
     "\41\00" ;; (i32.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\47" ;; i64.atomic.rmw32.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4648,7 +4648,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\47" ;; i64.atomic.rmw32.xchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4656,7 +4656,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\47" ;; i64.atomic.rmw32.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4665,7 +4665,7 @@
     "\42\00" ;; (i64.const 0)
     "\42\33" ;; (i64.const 51)
     "\fe\47" ;; i64.atomic.rmw32.xchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4843,7 +4843,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4a" ;; i32.atomic.rmw8.cmpxchg_u
-    "\02" ;; Alignment of 2
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
@@ -4851,7 +4851,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4a" ;; i32.atomic.rmw8.cmpxchg_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4860,7 +4860,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4a" ;; i32.atomic.rmw8.cmpxchg_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4869,7 +4869,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4a" ;; i32.atomic.rmw8.cmpxchg_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4878,7 +4878,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4a" ;; i32.atomic.rmw8.cmpxchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4888,7 +4888,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4a" ;; i32.atomic.rmw8.cmpxchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4898,7 +4898,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4a" ;; i32.atomic.rmw8.cmpxchg_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4907,7 +4907,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4a" ;; i32.atomic.rmw8.cmpxchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4917,7 +4917,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4a" ;; i32.atomic.rmw8.cmpxchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4927,7 +4927,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4b" ;; i32.atomic.rmw16.cmpxchg_u
-    "\02" ;; Alignment of 2
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
@@ -4935,7 +4935,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4b" ;; i32.atomic.rmw16.cmpxchg_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4944,7 +4944,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4b" ;; i32.atomic.rmw16.cmpxchg_u
-    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -4953,7 +4953,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4b" ;; i32.atomic.rmw16.cmpxchg_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4962,7 +4962,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4b" ;; i32.atomic.rmw16.cmpxchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -4972,7 +4972,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4b" ;; i32.atomic.rmw16.cmpxchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -4982,7 +4982,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4b" ;; i32.atomic.rmw16.cmpxchg_u
-    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -4991,7 +4991,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4b" ;; i32.atomic.rmw16.cmpxchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -5001,7 +5001,7 @@
     "\41\33" ;; (i32.const 51)
     "\41\33" ;; (i32.const 51)
     "\fe\4b" ;; i32.atomic.rmw16.cmpxchg_u
-    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -5011,7 +5011,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4c" ;; i64.atomic.rmw8.cmpxchg_u
-    "\03" ;; Alignment of 3
+    "\00" ;; Alignment of 0
     "\00" ;; offset
     "\1a" ;; drop
 
@@ -5019,7 +5019,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4c" ;; i64.atomic.rmw8.cmpxchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -5028,7 +5028,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4c" ;; i64.atomic.rmw8.cmpxchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\10" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -5037,7 +5037,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4c" ;; i64.atomic.rmw8.cmpxchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -5046,7 +5046,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4c" ;; i64.atomic.rmw8.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -5056,7 +5056,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4c" ;; i64.atomic.rmw8.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -5066,7 +5066,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4c" ;; i64.atomic.rmw8.cmpxchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\40" ;; Alignment of 0 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -5075,7 +5075,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4c" ;; i64.atomic.rmw8.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -5085,7 +5085,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4c" ;; i64.atomic.rmw8.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\50" ;; Alignment of 0 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -5095,7 +5095,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4d" ;; i64.atomic.rmw16.cmpxchg_u
-    "\03" ;; Alignment of 3
+    "\01" ;; Alignment of 1
     "\00" ;; offset
     "\1a" ;; drop
 
@@ -5103,7 +5103,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4d" ;; i64.atomic.rmw16.cmpxchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -5112,7 +5112,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4d" ;; i64.atomic.rmw16.cmpxchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\11" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -5121,7 +5121,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4d" ;; i64.atomic.rmw16.cmpxchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -5130,7 +5130,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4d" ;; i64.atomic.rmw16.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -5140,7 +5140,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4d" ;; i64.atomic.rmw16.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -5150,7 +5150,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4d" ;; i64.atomic.rmw16.cmpxchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\41" ;; Alignment of 1 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -5159,7 +5159,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4d" ;; i64.atomic.rmw16.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -5169,7 +5169,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4d" ;; i64.atomic.rmw16.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\51" ;; Alignment of 1 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -5179,7 +5179,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4e" ;; i64.atomic.rmw32.cmpxchg_u
-    "\03" ;; Alignment of 3
+    "\02" ;; Alignment of 2
     "\00" ;; offset
     "\1a" ;; drop
 
@@ -5187,7 +5187,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4e" ;; i64.atomic.rmw32.cmpxchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -5196,7 +5196,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4e" ;; i64.atomic.rmw32.cmpxchg_u
-    "\13" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows
+    "\12" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
     "\1a" ;; drop
@@ -5205,7 +5205,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4e" ;; i64.atomic.rmw32.cmpxchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -5214,7 +5214,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4e" ;; i64.atomic.rmw32.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -5224,7 +5224,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4e" ;; i64.atomic.rmw32.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\00" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset
@@ -5234,7 +5234,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4e" ;; i64.atomic.rmw32.cmpxchg_u
-    "\43" ;; Alignment of 3 with bit 6 set indicating that a memory index immediate follows
+    "\42" ;; Alignment of 2 with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; offset
     "\1a" ;; drop
@@ -5243,7 +5243,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4e" ;; i64.atomic.rmw32.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\11" ;; acqrel memory ordering
     "\00" ;; offset
@@ -5253,7 +5253,7 @@
     "\42\33" ;; (i64.const 51)
     "\42\33" ;; (i64.const 51)
     "\fe\4e" ;; i64.atomic.rmw32.cmpxchg_u
-    "\53" ;; Alignment of 3 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
+    "\52" ;; Alignment of 2 with bit 4 set indicating that an ordering immediate follows and with bit 6 set indicating that a memory index immediate follows
     "\01" ;; memory index
     "\00" ;; seqcst memory ordering
     "\00" ;; offset