From b2949d92e94fcf0ec7277a5d0b771304b5d19e52 Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:44:34 +0530 Subject: [PATCH 01/10] UPSTREAM-PEND: drivers: rtc: ti: mspm0: convert all APIs to native regis... PR: 115394 Replace all HAL calls to native register read/writes. Also, create macros in the same file eliminating the need for including the driver lib. This also adds a bug fix to the set alarm functions where earlier, Day of Month alarm write could overwrite Day of Week value. Both are combined into a single write to fix the problem. Signed-off-by: Sunil Hegde --- drivers/rtc/rtc_ti_mspm0.c | 278 +++++++++++++++++++++++++++---------- 1 file changed, 208 insertions(+), 70 deletions(-) diff --git a/drivers/rtc/rtc_ti_mspm0.c b/drivers/rtc/rtc_ti_mspm0.c index 3a02ab6331e2..e9eb1bd05b3e 100644 --- a/drivers/rtc/rtc_ti_mspm0.c +++ b/drivers/rtc/rtc_ti_mspm0.c @@ -1,5 +1,6 @@ /* * Copyright (c) 2025 Linumiz GmbH + * Copyright (c) 2026 Texas Instruments Inc. * * SPDX-License-Identifier: Apache-2.0 * @@ -16,7 +17,6 @@ #include #include #include "rtc_utils.h" -#include #if defined(CONFIG_RTC_ALARM) #define RTC_TI_ALARM_1 0 @@ -27,8 +27,114 @@ BUILD_ASSERT((RTC_TI_MAX_ALARM != 0), "CONFIG_RTC_ALARM is enabled, without setting alarms-count property"); #endif +#define RTC_MSPM0_PWREN_MASK BIT(0) +#define RTC_MSPM0_PWREN_KEY_MASK GENMASK(31, 24) +#define RTC_MSPM0_PWREN_KEY 0x26 + +#define RTC_MSPM0_CLKCTL_ENABLE BIT(31) + +#define RTC_MSPM0_CTL_BIN 0x0 + +#define RTC_MSPM0_SEC_BIN_MASK BIT_MASK(6) +#define RTC_MSPM0_MIN_BIN_MASK BIT_MASK(6) +#define RTC_MSPM0_HOUR_BIN_MASK BIT_MASK(5) +#define RTC_MSPM0_MDAY_BIN_MASK GENMASK(12, 8) +#define RTC_MSPM0_WDAY_BIN_MASK BIT_MASK(3) +#define RTC_MSPM0_MON_BIN_MASK BIT_MASK(4) +#define RTC_MSPM0_YEARLOW_BIN_MASK BIT_MASK(8) +#define RTC_MSPM0_YEARHIGH_BIN_MASK GENMASK(11, 8) + +#define RTC_MSPM0_IMASK_ALARM1 BIT(2) +#define RTC_MSPM0_IMASK_ALARM2 BIT(3) +#define RTC_MSPM0_AMIN_BIN_MASK BIT_MASK(6) +#define RTC_MSPM0_AMIN_BIN_ENABLE BIT(7) +#define RTC_MSPM0_AHOUR_BIN_MASK BIT_MASK(5) +#define RTC_MSPM0_AHOUR_BIN_ENABLE BIT(7) +#define RTC_MSPM0_ADAY_MON_BIN_MASK GENMASK(12, 8) +#define RTC_MSPM0_ADAY_MON_BIN_ENABLE BIT(15) +#define RTC_MSPM0_ADAY_WEEK_BIN_MASK BIT_MASK(3) +#define RTC_MSPM0_ADAY_WEEK_BIN_ENABLE BIT(7) + +#define RTC_MSPM0_IIDX_ALARM1 0x3 +#define RTC_MSPM0_IIDX_ALARM2 0x4 + +typedef struct { + volatile uint32_t iidx; /* Interrupt Index Register */ + uint32_t reserved0[1]; + volatile uint32_t imask; /* Interrupt Mask */ + uint32_t reserved1[1]; + volatile uint32_t ris; /* Raw Interrupt Status */ + uint32_t reserved2[1]; + volatile uint32_t mis; /* Masked Interrupt Status */ + uint32_t reserved3[1]; + volatile uint32_t iset; /* Interrupt Set */ + uint32_t reserved4[1]; + volatile uint32_t iclr; /* Interrupt Clear */ + uint32_t reserved5[1]; +} rtc_ti_mspm0_cpu_int_reg_t; + +typedef struct { + volatile uint32_t iidx; /* Interrupt Index Register */ + volatile uint32_t imask; /* Interrupt Mask */ + volatile uint32_t ris; /* Raw Interrupt Status */ + volatile uint32_t mis; /* Masked Interrupt Status */ + volatile uint32_t iset; /* Interrupt Set */ + volatile uint32_t iclr; /* Interrupt Clear */ +} rtc_ti_mspm0_gen_event_int_reg_t; + +typedef struct { + uint32_t reserved6[0x111]; + volatile uint32_t fpub_0; /* Publisher Port 0 @0x444h */ + uint32_t reserved7[0xEE]; + volatile uint32_t pwren; /* Power Enable @0x800h */ + volatile uint32_t rstctl; /* Reset Control @0x804h */ + volatile uint32_t clkcfg; /* Peripheral Clock Configuration @0x808h */ + uint32_t reserved8[2]; + volatile uint32_t stat; /* Status Register @0x814h */ + uint32_t reserved9[0x1FB]; + volatile uint32_t clksel; /* Clock Select @0x1004h */ + uint32_t reserved10[6]; + rtc_ti_mspm0_cpu_int_reg_t cpu_int; /* @0x1020h */ + rtc_ti_mspm0_gen_event_int_reg_t gen_event; /* @0x1050h */ + uint32_t reserved11[0x1E]; + volatile uint32_t evt_mode; /* Event Mode 0x10E0h */ + uint32_t reserved12[6]; + volatile uint32_t desc; /* RTC Descriptor Register @0x10FCh */ + volatile uint32_t clkctl; /* RTC Clock Control @0x1100h */ + volatile uint32_t dbgctl; /* RTC Debug Control @0x1104h */ + volatile uint32_t ctl; /* RTC Control @0x1108h */ + volatile uint32_t sta; /* RTC Status @0x110Ch */ + volatile uint32_t cal; /* RTC Clock Offset Calibration @0x1110h */ + volatile uint32_t tcmp; /* RTC Temperature Compensation @0x1114h */ + volatile uint32_t sec; /* RTC Seconds @0x1118h */ + volatile uint32_t min; /* RTC Minutes @0x111Ch */ + volatile uint32_t hour; /* RTC Hours @0x1120h */ + volatile uint32_t day; /* RTC Day of Week/Month @0x1124h */ + volatile uint32_t mon; /* RTC Month @0x1128h */ + volatile uint32_t year; /* RTC Year @0x112Ch */ + volatile uint32_t a1min; /* RTC Alarm 1 Minutes @0x1130h */ + volatile uint32_t a1hour; /* RTC Alarm 1 Hours @0x1134h */ + volatile uint32_t a1day; /* RTC Alarm 1 Day @0x1138h */ + volatile uint32_t a2min; /* RTC Alarm 2 Minutes @0x113Ch */ + volatile uint32_t a2hour; /* RTC Alarm 2 Hours @0x1140h */ + volatile uint32_t a2day; /* RTC Alarm 2 Day @0x1144h */ + volatile uint32_t psctl; /* RTC Prescale Timer 0/1 Control @0x1148h */ + volatile uint32_t extpsctl; /* RTC Prescale Timer 2 Control @0x114Ch */ + volatile uint32_t tssec; /* Time Stamp Seconds @0x1150h */ + volatile uint32_t tsmin; /* Time Stamp Minutes @0x1154h */ + volatile uint32_t tshour; /* Time Stamp Hours @0x1158h */ + volatile uint32_t tsday; /* Time Stamp Day Of Week/Month @0x115Ch */ + volatile uint32_t tsmon; /* Time Stamp Month @0x1160h */ + volatile uint32_t tsyear; /* Time Stamp Years @0x1164h */ + volatile uint32_t tsstat; /* Time Stamp Status @0x1168h */ + volatile uint32_t tsctl; /* Time Stamp Control @0x116Ch */ + volatile uint32_t tsclr; /* Time Stamp Clear @0x1170h */ + volatile uint32_t lfssrst; /* Low Frequency Subsystem Reset @0x1174h */ + volatile uint32_t rtclock; /* Real Time Clock Lock @0x1178h */ +} rtc_ti_mspm0_reg_t; + struct rtc_ti_mspm0_config { - RTC_Regs *regs; + rtc_ti_mspm0_reg_t *regs; #if defined(CONFIG_RTC_ALARM) void (*irq_config_func)(void); #endif @@ -62,13 +168,28 @@ static int rtc_ti_mspm0_set_time(const struct device *dev, } K_SPINLOCK(&data->lock) { - DL_RTC_Common_setCalendarSecondsBinary(cfg->regs, timeptr->tm_sec); - DL_RTC_Common_setCalendarMinutesBinary(cfg->regs, timeptr->tm_min); - DL_RTC_Common_setCalendarHoursBinary(cfg->regs, timeptr->tm_hour); - DL_RTC_Common_setCalendarDayOfWeekBinary(cfg->regs, timeptr->tm_wday); - DL_RTC_Common_setCalendarDayOfMonthBinary(cfg->regs, timeptr->tm_mday); - DL_RTC_Common_setCalendarMonthBinary(cfg->regs, timeptr->tm_mon); - DL_RTC_Common_setCalendarYearBinary(cfg->regs, timeptr->tm_year); + /* + * Back to back writes to counter/calendar registers such as + * SEC, MIN, HOUR, DAY, MON, YEAR need to be avoided since writes + * to calendar registers take 2 to 3 RTCCLK cycles to take effect. + */ + + /* Set calendar seconds in binary */ + cfg->regs->sec = timeptr->tm_sec & RTC_MSPM0_SEC_BIN_MASK; + /* Set calendar minutes in binary */ + cfg->regs->min = timeptr->tm_min & RTC_MSPM0_MIN_BIN_MASK; + /* Set calendar hours in binary */ + cfg->regs->hour = timeptr->tm_hour & RTC_MSPM0_HOUR_BIN_MASK; + /* Set calendar day in binary */ + /* Month of the day: bits 12-8 + * Month of the week: bits 2-0 + */ + cfg->regs->day = FIELD_PREP(RTC_MSPM0_MDAY_BIN_MASK, timeptr->tm_mday) | + FIELD_PREP(RTC_MSPM0_WDAY_BIN_MASK, timeptr->tm_wday); + /* Set calendar month in binary */ + cfg->regs->mon = mon & RTC_MSPM0_MON_BIN_MASK; + cfg->regs->year = + year & (RTC_MSPM0_YEARLOW_BIN_MASK | RTC_MSPM0_YEARHIGH_BIN_MASK); } return 0; @@ -85,15 +206,15 @@ static int rtc_ti_mspm0_get_time(const struct device *dev, } K_SPINLOCK(&data->lock) { - timeptr->tm_sec = DL_RTC_Common_getCalendarSecondsBinary(cfg->regs); - timeptr->tm_min = DL_RTC_Common_getCalendarMinutesBinary(cfg->regs); - timeptr->tm_hour = DL_RTC_Common_getCalendarHoursBinary(cfg->regs); - timeptr->tm_mday = DL_RTC_Common_getCalendarDayOfMonthBinary(cfg->regs); - timeptr->tm_mon = DL_RTC_Common_getCalendarMonthBinary(cfg->regs); - timeptr->tm_year = DL_RTC_Common_getCalendarYearBinary(cfg->regs); - timeptr->tm_wday = DL_RTC_Common_getCalendarDayOfWeekBinary(cfg->regs); - timeptr->tm_nsec = 0; - timeptr->tm_isdst = -1; + timeptr->tm_sec = cfg->regs->sec & RTC_MSPM0_SEC_BIN_MASK; + timeptr->tm_min = cfg->regs->min & RTC_MSPM0_MIN_BIN_MASK; + timeptr->tm_hour = cfg->regs->hour & RTC_MSPM0_HOUR_BIN_MASK; + timeptr->tm_mday = FIELD_GET(RTC_MSPM0_MDAY_BIN_MASK, cfg->regs->day); + timeptr->tm_mon = (cfg->regs->mon & RTC_MSPM0_MON_BIN_MASK) - 1; + timeptr->tm_year = (cfg->regs->year & + (RTC_MSPM0_YEARLOW_BIN_MASK | RTC_MSPM0_YEARHIGH_BIN_MASK)) - + 1900; + timeptr->tm_wday = FIELD_GET(RTC_MSPM0_WDAY_BIN_MASK, cfg->regs->day); } return 0; @@ -122,30 +243,37 @@ static inline void rtc_ti_mspm0_set_alarm1(const struct device *dev, { const struct rtc_ti_mspm0_config *cfg = dev->config; - DL_RTC_Common_disableInterrupt(cfg->regs, DL_RTC_COMMON_INTERRUPT_CALENDAR_ALARM1); + /* Disable Alarm 1 interrupt */ + cfg->regs->cpu_int.imask &= ~(RTC_MSPM0_IMASK_ALARM1); if (mask & RTC_ALARM_TIME_MASK_MINUTE) { - cfg->regs->A1MIN = 0; - DL_RTC_Common_setAlarm1MinutesBinary(cfg->regs, timeptr->tm_min); - DL_RTC_Common_enableAlarm1MinutesBinary(cfg->regs); + cfg->regs->a1min = 0; + /* Set alarm minutes and enable */ + cfg->regs->a1min = + RTC_MSPM0_AMIN_BIN_ENABLE | (timeptr->tm_min & RTC_MSPM0_AMIN_BIN_MASK); } if (mask & RTC_ALARM_TIME_MASK_HOUR) { - DL_RTC_Common_setAlarm1HoursBinary(cfg->regs, timeptr->tm_hour); - DL_RTC_Common_enableAlarm1HoursBinary(cfg->regs); + cfg->regs->a1hour = RTC_MSPM0_AHOUR_BIN_ENABLE | + (timeptr->tm_hour & RTC_MSPM0_AHOUR_BIN_MASK); } - if (mask & RTC_ALARM_TIME_MASK_WEEKDAY) { - DL_RTC_Common_setAlarm1DayOfWeekBinary(cfg->regs, timeptr->tm_wday); - DL_RTC_Common_enableAlarm1DayOfWeekBinary(cfg->regs); - } + if (mask & (RTC_ALARM_TIME_MASK_WEEKDAY | RTC_ALARM_TIME_MASK_MONTHDAY)) { + uint32_t day = 0; - if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { - DL_RTC_Common_setAlarm1DayOfMonthBinary(cfg->regs, timeptr->tm_mday); - DL_RTC_Common_enableAlarm1DayOfMonthBinary(cfg->regs); + if (mask & RTC_ALARM_TIME_MASK_WEEKDAY) { + day |= RTC_MSPM0_ADAY_WEEK_BIN_ENABLE | + (timeptr->tm_wday & RTC_MSPM0_ADAY_WEEK_BIN_MASK); + } + if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { + day |= RTC_MSPM0_ADAY_MON_BIN_ENABLE | + FIELD_PREP(RTC_MSPM0_ADAY_MON_BIN_MASK, timeptr->tm_mday); + } + cfg->regs->a1day = day; } - DL_RTC_Common_enableInterrupt(cfg->regs, DL_RTC_COMMON_INTERRUPT_CALENDAR_ALARM1); + /* Enable Alarm 1 interrupt */ + cfg->regs->cpu_int.imask |= RTC_MSPM0_IMASK_ALARM1; } static inline void rtc_ti_mspm0_set_alarm2(const struct device *dev, @@ -154,30 +282,37 @@ static inline void rtc_ti_mspm0_set_alarm2(const struct device *dev, { const struct rtc_ti_mspm0_config *cfg = dev->config; - DL_RTC_Common_disableInterrupt(cfg->regs, DL_RTC_COMMON_INTERRUPT_CALENDAR_ALARM2); + /* Disable Alarm 2 interrupt */ + cfg->regs->cpu_int.imask &= ~(RTC_MSPM0_IMASK_ALARM2); if (mask & RTC_ALARM_TIME_MASK_MINUTE) { - cfg->regs->A2MIN = 0; - DL_RTC_Common_setAlarm2MinutesBinary(cfg->regs, timeptr->tm_min); - DL_RTC_Common_enableAlarm2MinutesBinary(cfg->regs); + cfg->regs->a2min = 0; + /* Set alarm minutes and enable */ + cfg->regs->a2min = + RTC_MSPM0_AMIN_BIN_ENABLE | (timeptr->tm_min & RTC_MSPM0_AMIN_BIN_MASK); } if (mask & RTC_ALARM_TIME_MASK_HOUR) { - DL_RTC_Common_setAlarm2HoursBinary(cfg->regs, timeptr->tm_hour); - DL_RTC_Common_enableAlarm2HoursBinary(cfg->regs); + cfg->regs->a2hour = RTC_MSPM0_AHOUR_BIN_ENABLE | + (timeptr->tm_hour & RTC_MSPM0_AHOUR_BIN_MASK); } - if (mask & RTC_ALARM_TIME_MASK_WEEKDAY) { - DL_RTC_Common_setAlarm2DayOfWeekBinary(cfg->regs, timeptr->tm_wday); - DL_RTC_Common_enableAlarm2DayOfWeekBinary(cfg->regs); - } + if (mask & (RTC_ALARM_TIME_MASK_WEEKDAY | RTC_ALARM_TIME_MASK_MONTHDAY)) { + uint32_t day = 0; - if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { - DL_RTC_Common_setAlarm2DayOfMonthBinary(cfg->regs, timeptr->tm_mday); - DL_RTC_Common_enableAlarm2DayOfMonthBinary(cfg->regs); + if (mask & RTC_ALARM_TIME_MASK_WEEKDAY) { + day |= RTC_MSPM0_ADAY_WEEK_BIN_ENABLE | + (timeptr->tm_wday & RTC_MSPM0_ADAY_WEEK_BIN_MASK); + } + if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { + day |= RTC_MSPM0_ADAY_MON_BIN_ENABLE | + FIELD_PREP(RTC_MSPM0_ADAY_MON_BIN_MASK, timeptr->tm_mday); + } + cfg->regs->a2day = day; } - DL_RTC_Common_enableInterrupt(cfg->regs, DL_RTC_COMMON_INTERRUPT_CALENDAR_ALARM2); + /* Enable Alarm 2 interrupt */ + cfg->regs->cpu_int.imask |= RTC_MSPM0_IMASK_ALARM2; } static inline void rtc_ti_mspm0_clear_alarm(const struct device *dev, uint16_t id) @@ -185,13 +320,13 @@ static inline void rtc_ti_mspm0_clear_alarm(const struct device *dev, uint16_t i const struct rtc_ti_mspm0_config *cfg = dev->config; if (id == RTC_TI_ALARM_1) { - cfg->regs->A1MIN = 0x00; - cfg->regs->A1HOUR = 0x00; - cfg->regs->A1DAY = 0x00; + cfg->regs->a1min = 0x00; + cfg->regs->a1hour = 0x00; + cfg->regs->a1day = 0x00; } else { - cfg->regs->A2MIN = 0x00; - cfg->regs->A2HOUR = 0x00; - cfg->regs->A2DAY = 0x00; + cfg->regs->a2min = 0x00; + cfg->regs->a2hour = 0x00; + cfg->regs->a2day = 0x00; } } @@ -239,22 +374,22 @@ static int rtc_ti_mspm0_get_alarm1(const struct device *dev, alarm_mask = data->rtc_alarm[RTC_TI_ALARM_1].mask; if (alarm_mask & RTC_ALARM_TIME_MASK_MINUTE) { - timeptr->tm_min = DL_RTC_Common_getAlarm1MinutesBinary(cfg->regs); + timeptr->tm_min = cfg->regs->a1min & RTC_MSPM0_AMIN_BIN_MASK; return_mask |= RTC_ALARM_TIME_MASK_MINUTE; } if (alarm_mask & RTC_ALARM_TIME_MASK_HOUR) { - timeptr->tm_hour = DL_RTC_Common_getAlarm1HoursBinary(cfg->regs); + timeptr->tm_hour = cfg->regs->a1hour & RTC_MSPM0_AHOUR_BIN_MASK; return_mask |= RTC_ALARM_TIME_MASK_HOUR; } if (alarm_mask & RTC_ALARM_TIME_MASK_WEEKDAY) { - timeptr->tm_wday = DL_RTC_Common_getAlarm1DayOfWeekBinary(cfg->regs); + timeptr->tm_wday = FIELD_GET(RTC_MSPM0_ADAY_WEEK_BIN_MASK, cfg->regs->a1day); return_mask |= RTC_ALARM_TIME_MASK_WEEKDAY; } if (alarm_mask & RTC_ALARM_TIME_MASK_MONTHDAY) { - timeptr->tm_mday = DL_RTC_Common_getAlarm1DayOfMonthBinary(cfg->regs); + timeptr->tm_mday = FIELD_GET(RTC_MSPM0_ADAY_MON_BIN_MASK, cfg->regs->a1day); return_mask |= RTC_ALARM_TIME_MASK_MONTHDAY; } @@ -270,22 +405,22 @@ static int rtc_ti_mspm0_get_alarm2(const struct device *dev, struct rtc_time *ti alarm_mask = data->rtc_alarm[RTC_TI_ALARM_2].mask; if (alarm_mask & RTC_ALARM_TIME_MASK_MINUTE) { - timeptr->tm_min = DL_RTC_Common_getAlarm2MinutesBinary(cfg->regs); + timeptr->tm_min = cfg->regs->a2min & RTC_MSPM0_AMIN_BIN_MASK; return_mask |= RTC_ALARM_TIME_MASK_MINUTE; } if (alarm_mask & RTC_ALARM_TIME_MASK_HOUR) { - timeptr->tm_hour = DL_RTC_Common_getAlarm2HoursBinary(cfg->regs); + timeptr->tm_hour = cfg->regs->a2hour & RTC_MSPM0_AHOUR_BIN_MASK; return_mask |= RTC_ALARM_TIME_MASK_HOUR; } if (alarm_mask & RTC_ALARM_TIME_MASK_WEEKDAY) { - timeptr->tm_wday = DL_RTC_Common_getAlarm2DayOfWeekBinary(cfg->regs); + timeptr->tm_wday = FIELD_GET(RTC_MSPM0_ADAY_WEEK_BIN_MASK, cfg->regs->a2day); return_mask |= RTC_ALARM_TIME_MASK_WEEKDAY; } if (alarm_mask & RTC_ALARM_TIME_MASK_MONTHDAY) { - timeptr->tm_mday = DL_RTC_Common_getAlarm2DayOfMonthBinary(cfg->regs); + timeptr->tm_mday = FIELD_GET(RTC_MSPM0_ADAY_MON_BIN_MASK, cfg->regs->a2day); return_mask |= RTC_ALARM_TIME_MASK_MONTHDAY; } @@ -366,12 +501,12 @@ static void rtc_ti_mspm0_isr(const struct device *dev) struct rtc_ti_mspm0_data *data = dev->data; k_spinlock_key_t key = k_spin_lock(&data->lock); - switch (DL_RTC_Common_getPendingInterrupt(cfg->regs)) { - case DL_RTC_COMMON_IIDX_ALARM1: + switch (cfg->regs->cpu_int.iidx) { + case RTC_MSPM0_IIDX_ALARM1: id = RTC_TI_ALARM_1; alarm = &data->rtc_alarm[RTC_TI_ALARM_1]; break; - case DL_RTC_COMMON_IIDX_ALARM2: + case RTC_MSPM0_IIDX_ALARM2: id = RTC_TI_ALARM_2; alarm = &data->rtc_alarm[RTC_TI_ALARM_2]; break; @@ -396,14 +531,17 @@ static int rtc_ti_mspm0_init(const struct device *dev) const struct rtc_ti_mspm0_config *cfg = dev->config; if (!cfg->rtc_x) { - /* Enable power to RTC module */ - if (!DL_RTC_Common_isPowerEnabled(cfg->regs)) { - DL_RTC_Common_enablePower(cfg->regs); + if (!(cfg->regs->pwren & RTC_MSPM0_PWREN_MASK)) { + /* Write Power enable key and set Power enable bit simultaneously */ + cfg->regs->pwren = + FIELD_PREP(RTC_MSPM0_PWREN_KEY_MASK, RTC_MSPM0_PWREN_KEY) | + RTC_MSPM0_PWREN_MASK; } } - - DL_RTC_Common_enableClockControl(cfg->regs); - DL_RTC_Common_setClockFormat(cfg->regs, DL_RTC_COMMON_FORMAT_BINARY); + /* Enable 32k clock supply */ + cfg->regs->clkctl = RTC_MSPM0_CLKCTL_ENABLE; + /* Set clock format to binary */ + cfg->regs->ctl = RTC_MSPM0_CTL_BIN; #if defined(CONFIG_RTC_ALARM) cfg->irq_config_func(); @@ -436,7 +574,7 @@ static DEVICE_API(rtc, rtc_ti_mspm0_driver_api) = { static struct rtc_ti_mspm0_data rtc_data_##n; \ \ static struct rtc_ti_mspm0_config rtc_config_##n = { \ - .regs = (RTC_Regs *)DT_INST_REG_ADDR(n), \ + .regs = (rtc_ti_mspm0_reg_t *)DT_INST_REG_ADDR(n), \ .rtc_x = DT_INST_PROP(n, ti_rtc_x), \ IF_ENABLED(CONFIG_RTC_ALARM, \ (.irq_config_func = ti_mspm0_config_irq_##n,)) \ From c0c32c21bcfe46e28d6b8176f7e0e89aad698795 Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:44:46 +0530 Subject: [PATCH 02/10] UPSTREAM-PEND: drivers: rtc: ti: mspm0: Remove individual set and get al... PR: 115394 Add seperate register struct for Alarm registers in-order to reduce code duplication for set and get alarm APIs. Earlier, each alarm had its own APIs which are merged into a single API and is handled via the alarm id. Signed-off-by: Sunil Hegde --- drivers/rtc/rtc_ti_mspm0.c | 229 +++++++++++-------------------------- 1 file changed, 69 insertions(+), 160 deletions(-) diff --git a/drivers/rtc/rtc_ti_mspm0.c b/drivers/rtc/rtc_ti_mspm0.c index e9eb1bd05b3e..0fb5e057ef23 100644 --- a/drivers/rtc/rtc_ti_mspm0.c +++ b/drivers/rtc/rtc_ti_mspm0.c @@ -58,6 +58,12 @@ BUILD_ASSERT((RTC_TI_MAX_ALARM != 0), #define RTC_MSPM0_IIDX_ALARM1 0x3 #define RTC_MSPM0_IIDX_ALARM2 0x4 +typedef struct { + volatile uint32_t a_min; /* RTC Alarm Minutes */ + volatile uint32_t a_hour; /* RTC Alarm Hours */ + volatile uint32_t a_day; /* RTC Alarm Day */ +} rtc_ti_mspm0_alarm_reg_t; + typedef struct { volatile uint32_t iidx; /* Interrupt Index Register */ uint32_t reserved0[1]; @@ -112,12 +118,11 @@ typedef struct { volatile uint32_t day; /* RTC Day of Week/Month @0x1124h */ volatile uint32_t mon; /* RTC Month @0x1128h */ volatile uint32_t year; /* RTC Year @0x112Ch */ - volatile uint32_t a1min; /* RTC Alarm 1 Minutes @0x1130h */ - volatile uint32_t a1hour; /* RTC Alarm 1 Hours @0x1134h */ - volatile uint32_t a1day; /* RTC Alarm 1 Day @0x1138h */ - volatile uint32_t a2min; /* RTC Alarm 2 Minutes @0x113Ch */ - volatile uint32_t a2hour; /* RTC Alarm 2 Hours @0x1140h */ - volatile uint32_t a2day; /* RTC Alarm 2 Day @0x1144h */ + /* + * Alarm 1 @0x1130h + * Alarm 2 @0x113Ch + */ + rtc_ti_mspm0_alarm_reg_t alarm[2]; volatile uint32_t psctl; /* RTC Prescale Timer 0/1 Control @0x1148h */ volatile uint32_t extpsctl; /* RTC Prescale Timer 2 Control @0x114Ch */ volatile uint32_t tssec; /* Time Stamp Seconds @0x1150h */ @@ -237,96 +242,18 @@ static int rtc_ti_mspm0_alarm_get_supported_fields(const struct device *dev, return 0; } -static inline void rtc_ti_mspm0_set_alarm1(const struct device *dev, - uint16_t mask, - const struct rtc_time *timeptr) -{ - const struct rtc_ti_mspm0_config *cfg = dev->config; - - /* Disable Alarm 1 interrupt */ - cfg->regs->cpu_int.imask &= ~(RTC_MSPM0_IMASK_ALARM1); - - if (mask & RTC_ALARM_TIME_MASK_MINUTE) { - cfg->regs->a1min = 0; - /* Set alarm minutes and enable */ - cfg->regs->a1min = - RTC_MSPM0_AMIN_BIN_ENABLE | (timeptr->tm_min & RTC_MSPM0_AMIN_BIN_MASK); - } - - if (mask & RTC_ALARM_TIME_MASK_HOUR) { - cfg->regs->a1hour = RTC_MSPM0_AHOUR_BIN_ENABLE | - (timeptr->tm_hour & RTC_MSPM0_AHOUR_BIN_MASK); - } - - if (mask & (RTC_ALARM_TIME_MASK_WEEKDAY | RTC_ALARM_TIME_MASK_MONTHDAY)) { - uint32_t day = 0; - - if (mask & RTC_ALARM_TIME_MASK_WEEKDAY) { - day |= RTC_MSPM0_ADAY_WEEK_BIN_ENABLE | - (timeptr->tm_wday & RTC_MSPM0_ADAY_WEEK_BIN_MASK); - } - if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { - day |= RTC_MSPM0_ADAY_MON_BIN_ENABLE | - FIELD_PREP(RTC_MSPM0_ADAY_MON_BIN_MASK, timeptr->tm_mday); - } - cfg->regs->a1day = day; - } - - /* Enable Alarm 1 interrupt */ - cfg->regs->cpu_int.imask |= RTC_MSPM0_IMASK_ALARM1; -} - -static inline void rtc_ti_mspm0_set_alarm2(const struct device *dev, - uint16_t mask, - const struct rtc_time *timeptr) -{ - const struct rtc_ti_mspm0_config *cfg = dev->config; - - /* Disable Alarm 2 interrupt */ - cfg->regs->cpu_int.imask &= ~(RTC_MSPM0_IMASK_ALARM2); - - if (mask & RTC_ALARM_TIME_MASK_MINUTE) { - cfg->regs->a2min = 0; - /* Set alarm minutes and enable */ - cfg->regs->a2min = - RTC_MSPM0_AMIN_BIN_ENABLE | (timeptr->tm_min & RTC_MSPM0_AMIN_BIN_MASK); - } - - if (mask & RTC_ALARM_TIME_MASK_HOUR) { - cfg->regs->a2hour = RTC_MSPM0_AHOUR_BIN_ENABLE | - (timeptr->tm_hour & RTC_MSPM0_AHOUR_BIN_MASK); - } - - if (mask & (RTC_ALARM_TIME_MASK_WEEKDAY | RTC_ALARM_TIME_MASK_MONTHDAY)) { - uint32_t day = 0; - - if (mask & RTC_ALARM_TIME_MASK_WEEKDAY) { - day |= RTC_MSPM0_ADAY_WEEK_BIN_ENABLE | - (timeptr->tm_wday & RTC_MSPM0_ADAY_WEEK_BIN_MASK); - } - if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { - day |= RTC_MSPM0_ADAY_MON_BIN_ENABLE | - FIELD_PREP(RTC_MSPM0_ADAY_MON_BIN_MASK, timeptr->tm_mday); - } - cfg->regs->a2day = day; - } - - /* Enable Alarm 2 interrupt */ - cfg->regs->cpu_int.imask |= RTC_MSPM0_IMASK_ALARM2; -} - static inline void rtc_ti_mspm0_clear_alarm(const struct device *dev, uint16_t id) { const struct rtc_ti_mspm0_config *cfg = dev->config; + cfg->regs->alarm[id].a_min = 0x00; + cfg->regs->alarm[id].a_hour = 0x00; + cfg->regs->alarm[id].a_day = 0x00; + if (id == RTC_TI_ALARM_1) { - cfg->regs->a1min = 0x00; - cfg->regs->a1hour = 0x00; - cfg->regs->a1day = 0x00; + cfg->regs->cpu_int.imask &= ~RTC_MSPM0_IMASK_ALARM1; } else { - cfg->regs->a2min = 0x00; - cfg->regs->a2hour = 0x00; - cfg->regs->a2day = 0x00; + cfg->regs->cpu_int.imask &= ~RTC_MSPM0_IMASK_ALARM2; } } @@ -334,7 +261,9 @@ static int rtc_ti_mspm0_alarm_set_time(const struct device *dev, uint16_t id, uint16_t mask, const struct rtc_time *timeptr) { + const struct rtc_ti_mspm0_config *cfg = dev->config; struct rtc_ti_mspm0_data *data = dev->data; + uint32_t imask_bit; if (timeptr == NULL) { return -EINVAL; @@ -348,15 +277,37 @@ static int rtc_ti_mspm0_alarm_set_time(const struct device *dev, uint16_t id, return -EINVAL; } + imask_bit = (id == RTC_TI_ALARM_1) ? RTC_MSPM0_IMASK_ALARM1 : RTC_MSPM0_IMASK_ALARM2; + K_SPINLOCK(&data->lock) { rtc_ti_mspm0_clear_alarm(dev, id); - if (id == RTC_TI_ALARM_1) { - rtc_ti_mspm0_set_alarm1(dev, mask, timeptr); - } else { - rtc_ti_mspm0_set_alarm2(dev, mask, timeptr); + if (mask & RTC_ALARM_TIME_MASK_MINUTE) { + cfg->regs->alarm[id].a_min = RTC_MSPM0_AMIN_BIN_ENABLE | + (timeptr->tm_min & RTC_MSPM0_AMIN_BIN_MASK); + } + + if (mask & RTC_ALARM_TIME_MASK_HOUR) { + cfg->regs->alarm[id].a_hour = + RTC_MSPM0_AHOUR_BIN_ENABLE | + (timeptr->tm_hour & RTC_MSPM0_AHOUR_BIN_MASK); + } + + if (mask & (RTC_ALARM_TIME_MASK_WEEKDAY | RTC_ALARM_TIME_MASK_MONTHDAY)) { + uint32_t day = 0; + + if (mask & RTC_ALARM_TIME_MASK_WEEKDAY) { + day |= RTC_MSPM0_ADAY_WEEK_BIN_ENABLE | + (timeptr->tm_wday & RTC_MSPM0_ADAY_WEEK_BIN_MASK); + } + if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { + day |= RTC_MSPM0_ADAY_MON_BIN_ENABLE | + FIELD_PREP(RTC_MSPM0_ADAY_MON_BIN_MASK, timeptr->tm_mday); + } + cfg->regs->alarm[id].a_day = day; } + cfg->regs->cpu_int.imask |= imask_bit; data->rtc_alarm[id].mask = mask; data->rtc_alarm[id].is_pending = false; } @@ -364,74 +315,14 @@ static int rtc_ti_mspm0_alarm_set_time(const struct device *dev, uint16_t id, return 0; } -static int rtc_ti_mspm0_get_alarm1(const struct device *dev, - struct rtc_time *timeptr) -{ - uint16_t return_mask = 0; - uint16_t alarm_mask = 0; - const struct rtc_ti_mspm0_config *cfg = dev->config; - struct rtc_ti_mspm0_data *data = dev->data; - - alarm_mask = data->rtc_alarm[RTC_TI_ALARM_1].mask; - if (alarm_mask & RTC_ALARM_TIME_MASK_MINUTE) { - timeptr->tm_min = cfg->regs->a1min & RTC_MSPM0_AMIN_BIN_MASK; - return_mask |= RTC_ALARM_TIME_MASK_MINUTE; - } - - if (alarm_mask & RTC_ALARM_TIME_MASK_HOUR) { - timeptr->tm_hour = cfg->regs->a1hour & RTC_MSPM0_AHOUR_BIN_MASK; - return_mask |= RTC_ALARM_TIME_MASK_HOUR; - } - - if (alarm_mask & RTC_ALARM_TIME_MASK_WEEKDAY) { - timeptr->tm_wday = FIELD_GET(RTC_MSPM0_ADAY_WEEK_BIN_MASK, cfg->regs->a1day); - return_mask |= RTC_ALARM_TIME_MASK_WEEKDAY; - } - - if (alarm_mask & RTC_ALARM_TIME_MASK_MONTHDAY) { - timeptr->tm_mday = FIELD_GET(RTC_MSPM0_ADAY_MON_BIN_MASK, cfg->regs->a1day); - return_mask |= RTC_ALARM_TIME_MASK_MONTHDAY; - } - - return return_mask; -} - -static int rtc_ti_mspm0_get_alarm2(const struct device *dev, struct rtc_time *timeptr) +static int rtc_ti_mspm0_alarm_get_time(const struct device *dev, uint16_t id, + uint16_t *mask, struct rtc_time *timeptr) { uint16_t return_mask = 0; uint16_t alarm_mask = 0; const struct rtc_ti_mspm0_config *cfg = dev->config; struct rtc_ti_mspm0_data *data = dev->data; - alarm_mask = data->rtc_alarm[RTC_TI_ALARM_2].mask; - if (alarm_mask & RTC_ALARM_TIME_MASK_MINUTE) { - timeptr->tm_min = cfg->regs->a2min & RTC_MSPM0_AMIN_BIN_MASK; - return_mask |= RTC_ALARM_TIME_MASK_MINUTE; - } - - if (alarm_mask & RTC_ALARM_TIME_MASK_HOUR) { - timeptr->tm_hour = cfg->regs->a2hour & RTC_MSPM0_AHOUR_BIN_MASK; - return_mask |= RTC_ALARM_TIME_MASK_HOUR; - } - - if (alarm_mask & RTC_ALARM_TIME_MASK_WEEKDAY) { - timeptr->tm_wday = FIELD_GET(RTC_MSPM0_ADAY_WEEK_BIN_MASK, cfg->regs->a2day); - return_mask |= RTC_ALARM_TIME_MASK_WEEKDAY; - } - - if (alarm_mask & RTC_ALARM_TIME_MASK_MONTHDAY) { - timeptr->tm_mday = FIELD_GET(RTC_MSPM0_ADAY_MON_BIN_MASK, cfg->regs->a2day); - return_mask |= RTC_ALARM_TIME_MASK_MONTHDAY; - } - - return return_mask; -} - -static int rtc_ti_mspm0_alarm_get_time(const struct device *dev, uint16_t id, - uint16_t *mask, struct rtc_time *timeptr) -{ - struct rtc_ti_mspm0_data *data = dev->data; - if (timeptr == NULL) { return -EINVAL; } @@ -441,11 +332,29 @@ static int rtc_ti_mspm0_alarm_get_time(const struct device *dev, uint16_t id, } K_SPINLOCK(&data->lock) { - if (id == RTC_TI_ALARM_1) { - *mask = rtc_ti_mspm0_get_alarm1(dev, timeptr); - } else { - *mask = rtc_ti_mspm0_get_alarm2(dev, timeptr); + alarm_mask = data->rtc_alarm[id].mask; + + if (alarm_mask & RTC_ALARM_TIME_MASK_MINUTE) { + timeptr->tm_min = cfg->regs->alarm[id].a_min & RTC_MSPM0_AMIN_BIN_MASK; + return_mask |= RTC_ALARM_TIME_MASK_MINUTE; } + if (alarm_mask & RTC_ALARM_TIME_MASK_HOUR) { + timeptr->tm_hour = + cfg->regs->alarm[id].a_hour & RTC_MSPM0_AHOUR_BIN_MASK; + return_mask |= RTC_ALARM_TIME_MASK_HOUR; + } + if (alarm_mask & RTC_ALARM_TIME_MASK_WEEKDAY) { + timeptr->tm_wday = FIELD_GET(RTC_MSPM0_ADAY_WEEK_BIN_MASK, + cfg->regs->alarm[id].a_day); + return_mask |= RTC_ALARM_TIME_MASK_WEEKDAY; + } + if (alarm_mask & RTC_ALARM_TIME_MASK_MONTHDAY) { + timeptr->tm_mday = FIELD_GET(RTC_MSPM0_ADAY_MON_BIN_MASK, + cfg->regs->alarm[id].a_day); + return_mask |= RTC_ALARM_TIME_MASK_MONTHDAY; + } + + *mask = return_mask; } return 0; From b191209b48972ad739b575cbd4db5e28d0847501 Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:44:46 +0530 Subject: [PATCH 03/10] UPSTREAM-PEND: drivers: rtc: ti: mspm0: Add checks in Alarm APIs PR: 115394 Add value check for rtc time passed in set alarm API and allow clearing an alarm via the set API. Allow alarm callback to be set to null as the existing Tests suggest. Signed-off-by: Sunil Hegde --- drivers/rtc/rtc_ti_mspm0.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/rtc/rtc_ti_mspm0.c b/drivers/rtc/rtc_ti_mspm0.c index 0fb5e057ef23..26fb619341e7 100644 --- a/drivers/rtc/rtc_ti_mspm0.c +++ b/drivers/rtc/rtc_ti_mspm0.c @@ -265,11 +265,20 @@ static int rtc_ti_mspm0_alarm_set_time(const struct device *dev, uint16_t id, struct rtc_ti_mspm0_data *data = dev->data; uint32_t imask_bit; - if (timeptr == NULL) { + if (id != RTC_TI_ALARM_1 && id != RTC_TI_ALARM_2) { return -EINVAL; } - if (id != RTC_TI_ALARM_1 && id != RTC_TI_ALARM_2) { + if (mask == 0) { + K_SPINLOCK(&data->lock) { + rtc_ti_mspm0_clear_alarm(dev, id); + data->rtc_alarm[id].mask = 0; + data->rtc_alarm[id].is_pending = false; + } + return 0; + } + + if (timeptr == NULL) { return -EINVAL; } @@ -366,10 +375,6 @@ static int rtc_ti_mspm0_alarm_set_callback(const struct device *dev, uint16_t id { struct rtc_ti_mspm0_data *data = dev->data; - if (callback == NULL) { - return -EINVAL; - } - if (id != RTC_TI_ALARM_1 && id != RTC_TI_ALARM_2) { return -EINVAL; } From 447000b4bb3ca7cea472480fcd34c9af0592fa2d Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:44:46 +0530 Subject: [PATCH 04/10] UPSTREAM-PEND: drivers: rtc: ti: mspm0: Remove alarm callback from insid... PR: 115394 In the ISR, the alarm should not be called while still holding the lock. Therefore, copy the contents to a local alarm struct inside the lock and callback is triggered once lock is released. Also, change some functions using k_spinlock_t to use K_SPINLOCK macro for uniformity. Signed-off-by: Sunil Hegde --- drivers/rtc/rtc_ti_mspm0.c | 56 +++++++++++++++++++------------------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/rtc/rtc_ti_mspm0.c b/drivers/rtc/rtc_ti_mspm0.c index 26fb619341e7..07b40b2494a3 100644 --- a/drivers/rtc/rtc_ti_mspm0.c +++ b/drivers/rtc/rtc_ti_mspm0.c @@ -397,46 +397,46 @@ static int rtc_ti_mspm0_alarm_is_pending(const struct device *dev, uint16_t id) return -EINVAL; } - k_spinlock_key_t key = k_spin_lock(&data->lock); - - alarm = &data->rtc_alarm[id]; - ret = alarm->is_pending ? 1 : 0; - alarm->is_pending = false; + K_SPINLOCK(&data->lock) { + alarm = &data->rtc_alarm[id]; + ret = alarm->is_pending ? 1 : 0; + alarm->is_pending = false; + } - k_spin_unlock(&data->lock, key); return ret; } static void rtc_ti_mspm0_isr(const struct device *dev) { - uint8_t id; - struct rtc_ti_mspm0_alarm *alarm = NULL; const struct rtc_ti_mspm0_config *cfg = dev->config; struct rtc_ti_mspm0_data *data = dev->data; - k_spinlock_key_t key = k_spin_lock(&data->lock); - - switch (cfg->regs->cpu_int.iidx) { - case RTC_MSPM0_IIDX_ALARM1: - id = RTC_TI_ALARM_1; - alarm = &data->rtc_alarm[RTC_TI_ALARM_1]; - break; - case RTC_MSPM0_IIDX_ALARM2: - id = RTC_TI_ALARM_2; - alarm = &data->rtc_alarm[RTC_TI_ALARM_2]; - break; - default: - goto out; - } + struct rtc_ti_mspm0_alarm alarm = {0}; + uint8_t alarm_id = 0; + bool has_cb = false; - if (alarm != NULL) { - alarm->is_pending = true; - if (alarm->callback) { - alarm->callback(dev, id, alarm->user_data); + K_SPINLOCK(&data->lock) { + switch (cfg->regs->cpu_int.iidx) { + case RTC_MSPM0_IIDX_ALARM1: + alarm_id = RTC_TI_ALARM_1; + break; + case RTC_MSPM0_IIDX_ALARM2: + alarm_id = RTC_TI_ALARM_2; + break; + default: + K_SPINLOCK_BREAK; + } + + alarm = data->rtc_alarm[alarm_id]; + if (!alarm.callback) { + data->rtc_alarm[alarm_id].is_pending = true; + } else { + has_cb = true; } } -out: - k_spin_unlock(&data->lock, key); + if (has_cb) { + alarm.callback(dev, alarm_id, alarm.user_data); + } } #endif From ee9ddd5379a1626771a1dcebc176a17bc3e49b1b Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:45:40 +0530 Subject: [PATCH 05/10] UPSTREAM-PEND: boards: ti: lp_mspm0g3519: Add RTC support PR: 115394 Add RTC as a supported peripheral in the board.yaml Signed-off-by: Sunil Hegde --- boards/ti/lp_mspm0g3519/lp_mspm0g3519.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/boards/ti/lp_mspm0g3519/lp_mspm0g3519.yaml b/boards/ti/lp_mspm0g3519/lp_mspm0g3519.yaml index 5a075cbcd2f4..ed880f36b541 100644 --- a/boards/ti/lp_mspm0g3519/lp_mspm0g3519.yaml +++ b/boards/ti/lp_mspm0g3519/lp_mspm0g3519.yaml @@ -19,4 +19,5 @@ supported: - trng - counter - watchdog + - rtc vendor: ti From b57527e6cd6d3b1b5b7878ea4f41879bac3e3b92 Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:46:20 +0530 Subject: [PATCH 06/10] UPSTREAM-PEND: boards: ti: lp_mspm0g3507: Add RTC support PR: 115394 Add RTC as a supported peripheral in the board.yaml Signed-off-by: Sunil Hegde --- boards/ti/lp_mspm0g3507/lp_mspm0g3507.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/boards/ti/lp_mspm0g3507/lp_mspm0g3507.yaml b/boards/ti/lp_mspm0g3507/lp_mspm0g3507.yaml index 7aa2098adc16..1a45c03b6090 100644 --- a/boards/ti/lp_mspm0g3507/lp_mspm0g3507.yaml +++ b/boards/ti/lp_mspm0g3507/lp_mspm0g3507.yaml @@ -19,4 +19,5 @@ supported: - trng - counter - watchdog + - rtc vendor: ti From e75fb0637ad09be31df84162002f6ece8f8cf804 Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:46:38 +0530 Subject: [PATCH 07/10] UPSTREAM-PEND: dts: arm: ti: mspm33c: Add RTC node PR: 115394 Add RTC node and corresponding interrupt to the MSPM33 base dt. Signed-off-by: Sunil Hegde --- dts/arm/ti/mspm33c/mspm33c.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/dts/arm/ti/mspm33c/mspm33c.dtsi b/dts/arm/ti/mspm33c/mspm33c.dtsi index 81ab8f6b9891..78b44531cf57 100644 --- a/dts/arm/ti/mspm33c/mspm33c.dtsi +++ b/dts/arm/ti/mspm33c/mspm33c.dtsi @@ -214,6 +214,15 @@ #dma-cells = <2>; status = "disabled"; }; + + rtc: rtc@400d8000 { + compatible = "ti,mspm0-rtc"; + reg = <0x400d8000 0x2000>; + interrupts = <42 0>; + alarms-count = <2>; + ti,rtc-x; + status = "disabled"; + }; }; }; From ed7912433afb417379c0a261f078254cbadd8efc Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:47:08 +0530 Subject: [PATCH 08/10] UPSTREAM-PEND: boards: ti: lp_mspm33c321a: Add RTC support PR: 115394 Add RTC as a supported peripheral in the board.yaml Signed-off-by: Sunil Hegde --- boards/ti/lp_mspm33c321a/lp_mspm33c321a.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/boards/ti/lp_mspm33c321a/lp_mspm33c321a.yaml b/boards/ti/lp_mspm33c321a/lp_mspm33c321a.yaml index ba8df573127c..a9c249d43631 100644 --- a/boards/ti/lp_mspm33c321a/lp_mspm33c321a.yaml +++ b/boards/ti/lp_mspm33c321a/lp_mspm33c321a.yaml @@ -8,4 +8,5 @@ ram: 256 flash: 1024 supported: - dma + - rtc vendor: ti From 0363057ff36fa79bda42b51c9901674e5206ebd8 Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:47:26 +0530 Subject: [PATCH 09/10] UPSTREAM-PEND: samples: drivers: rtc: boards: Add overlay for mspm33c321a PR: 115394 Add board overlay for lp_mspm33c321a board Signed-off-by: Sunil Hegde --- samples/drivers/rtc/boards/lp_mspm33c321a.overlay | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 samples/drivers/rtc/boards/lp_mspm33c321a.overlay diff --git a/samples/drivers/rtc/boards/lp_mspm33c321a.overlay b/samples/drivers/rtc/boards/lp_mspm33c321a.overlay new file mode 100644 index 000000000000..559fdf97a446 --- /dev/null +++ b/samples/drivers/rtc/boards/lp_mspm33c321a.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2026 Texas Instruments Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + rtc = &rtc; + }; +}; + +&rtc { + status = "okay"; +}; From d0945a7a6819bf3223d3d060c9abf841bc391a8e Mon Sep 17 00:00:00 2001 From: Sunil Hegde Date: Wed, 7 Oct 2026 14:47:26 +0530 Subject: [PATCH 10/10] UPSTREAM-PEND: tests: drivers: rtc: rtc_api: boards: Add overlays and co... PR: 115394 Add overlays and config files for the following boards to enable twister tests: - lp_mspm0g3519 - lp_mspm0l2228 - lp_mspm33c321a Signed-off-by: Sunil Hegde --- .../drivers/rtc/rtc_api/boards/lp_mspm0g3519.conf | 1 + .../rtc/rtc_api/boards/lp_mspm0g3519.overlay | 15 +++++++++++++++ .../drivers/rtc/rtc_api/boards/lp_mspm0l2228.conf | 1 + .../rtc/rtc_api/boards/lp_mspm0l2228.overlay | 15 +++++++++++++++ .../rtc/rtc_api/boards/lp_mspm33c321a.conf | 1 + .../rtc/rtc_api/boards/lp_mspm33c321a.overlay | 15 +++++++++++++++ 6 files changed, 48 insertions(+) create mode 100644 tests/drivers/rtc/rtc_api/boards/lp_mspm0g3519.conf create mode 100644 tests/drivers/rtc/rtc_api/boards/lp_mspm0g3519.overlay create mode 100644 tests/drivers/rtc/rtc_api/boards/lp_mspm0l2228.conf create mode 100644 tests/drivers/rtc/rtc_api/boards/lp_mspm0l2228.overlay create mode 100644 tests/drivers/rtc/rtc_api/boards/lp_mspm33c321a.conf create mode 100644 tests/drivers/rtc/rtc_api/boards/lp_mspm33c321a.overlay diff --git a/tests/drivers/rtc/rtc_api/boards/lp_mspm0g3519.conf b/tests/drivers/rtc/rtc_api/boards/lp_mspm0g3519.conf new file mode 100644 index 000000000000..d8e316b0bf27 --- /dev/null +++ b/tests/drivers/rtc/rtc_api/boards/lp_mspm0g3519.conf @@ -0,0 +1 @@ +CONFIG_RTC_ALARM=y diff --git a/tests/drivers/rtc/rtc_api/boards/lp_mspm0g3519.overlay b/tests/drivers/rtc/rtc_api/boards/lp_mspm0g3519.overlay new file mode 100644 index 000000000000..559fdf97a446 --- /dev/null +++ b/tests/drivers/rtc/rtc_api/boards/lp_mspm0g3519.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2026 Texas Instruments Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + rtc = &rtc; + }; +}; + +&rtc { + status = "okay"; +}; diff --git a/tests/drivers/rtc/rtc_api/boards/lp_mspm0l2228.conf b/tests/drivers/rtc/rtc_api/boards/lp_mspm0l2228.conf new file mode 100644 index 000000000000..d8e316b0bf27 --- /dev/null +++ b/tests/drivers/rtc/rtc_api/boards/lp_mspm0l2228.conf @@ -0,0 +1 @@ +CONFIG_RTC_ALARM=y diff --git a/tests/drivers/rtc/rtc_api/boards/lp_mspm0l2228.overlay b/tests/drivers/rtc/rtc_api/boards/lp_mspm0l2228.overlay new file mode 100644 index 000000000000..559fdf97a446 --- /dev/null +++ b/tests/drivers/rtc/rtc_api/boards/lp_mspm0l2228.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2026 Texas Instruments Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + rtc = &rtc; + }; +}; + +&rtc { + status = "okay"; +}; diff --git a/tests/drivers/rtc/rtc_api/boards/lp_mspm33c321a.conf b/tests/drivers/rtc/rtc_api/boards/lp_mspm33c321a.conf new file mode 100644 index 000000000000..d8e316b0bf27 --- /dev/null +++ b/tests/drivers/rtc/rtc_api/boards/lp_mspm33c321a.conf @@ -0,0 +1 @@ +CONFIG_RTC_ALARM=y diff --git a/tests/drivers/rtc/rtc_api/boards/lp_mspm33c321a.overlay b/tests/drivers/rtc/rtc_api/boards/lp_mspm33c321a.overlay new file mode 100644 index 000000000000..559fdf97a446 --- /dev/null +++ b/tests/drivers/rtc/rtc_api/boards/lp_mspm33c321a.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2026 Texas Instruments Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + rtc = &rtc; + }; +}; + +&rtc { + status = "okay"; +};