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[Harness] FPGA-Real-Time-Decoder #3

@wuxian3

Description

@wuxian3

Primary Harness Type

Full harness system - knowledge base + tools + skills + onboarding design

Project Goal

We want to develop a project, such that it can decode the measurements of Surface Code logical qubits. Also, we want to use verilog to simulate its FPGA performance.

Planned Components

  • Knowledge base, examples, or domain notes
  • Skill file or agent instructions
  • Command line scripts, Makefile targets, or a small CLI
  • MCP server or external service integration
  • Tests, checks, evaluation cases, or review prompts
  • Setup guide, tutorial, or onboarding flow
  • Demo repo, sample data, or reproducible example

Before-Event Plan

We will install verilog extensions on VS code.

Target AI Coding Tool

Codex CLI

Participation Readiness

  • I have access to a Bash or Zsh terminal. Windows users can use WSL 2.
  • I have installed Codex CLI, Claude Code, or another AI coding tool.
  • I have tried logging in to my AI coding tool before the event.
  • I have a concrete workflow, sample input, or starter repo to work on.

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No response

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