Stress test (arm_tsan): server dies with SIGILL in SimSIMD's ARM capability probe

[CarlosFelipeOR]

Describe the situation

Stress test (arm_tsan) dies mid-run on antalya-26.6 — 25 of 37 branch runs since 2026-07-15 —
and on antalya-26.8. The report says Unknown error; the server log says SIGILL:

BaseDaemon: Signal description: Illegal instruction
5. contrib/SimSIMD/include/simsimd/simsimd.h:0: _simsimd_capabilities_arm
6. contrib/SimSIMD/c/lib.c:299:12: simsimd_capabilities
7. src/Functions/array/distanceTransposed.cpp:421: resolveSimdKernel<BFloat16>
Application: Child process was terminated by signal 4.

SimSIMD detects CPU features in _simsimd_capabilities_arm. That function sits inside
#pragma GCC target("arch=armv8.5-a+sve") (simsimd.h:475), so the compiler may emit SVE
instructions in the function that asks whether the CPU supports SVE. Sanitizer codegen emits one.
Neoverse N1 and Graviton2 have no SVE, and our supported ARM baseline covers both.

SIMSIMD_TARGET_SVE=0, already set in contrib/SimSIMD-cmake/CMakeLists.txt for MSan, gates the
SVE kernels and not the pragma. The probe started running at query-planning time in
ClickHouse#106701, which is why 26.6 and 26.8 fail and 26.5 does not.

How to reproduce

ARM VM without SVE, TSan build:

python3 -m ci.praktika run "Stateless tests (arm_binary, parallel)" \
  --test 03369_l2_distance_transposed_variadic

The server dies in about 80 seconds.

Additional context

• Job: Stress test (arm_tsan), branch antalya-26.6, commit b3c747bb0358bd959c0f7b53431e2238e2f55f26 —
  logs
• The linked PR is a workaround: it stops building SimSIMD for ARM sanitizer builds.
• The fix belongs in SimSIMD. The pragma exists only so the assembler accepts the register name
  id_aa64zfr0_el1; S3_0_C0_C4_4 names the same register without raising the architecture.
  No upstream issue tracks this.

Closing this issue means reverting the workaround PR.